Learn more about the application of Xilinx FPGA general-purpose IP cores in communications

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Learn more about the application of Xilinx FPGA general-purpose IP cores in communications [Copy link]

 

The book "Xilinx FPGA Advanced Application: Detailed Explanation and Design and Development of General IP Cores" systematically explains the IP hard cores inside Xilinx FPGA in the field of communication networks. Taking the popular Xilinx Virtex-6 model chip as an example, it covers the mainstream IP cores of Xilinx FPGA in the field of communication, and explains the characteristics and usage methods of Xilinx FPGA clock resources and DCM, PLL and MMCM clock managers; introduces the use process of generating ROM, RAM, FIFO and CAM cores based on Block RAM resources. Explains the background knowledge, internal structure, port timing and configuration parameters of the TEMAC core, and gives a generation example; introduces LVDS technical specifications, source synchronization implementation solutions and de-skew technology, and explains the use methods of IODELAYE1, ISERDES1 and OSERDES cores in Xilinx FPGA; explains the structural composition, module division, port signals and physical constraints of the Xilinx FPGA DDR3 controller IP core.

Download address of this book: https://download.eeworld.com.cn/detail/qianleikuihai/563914