How to quickly start embedded system development

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How to quickly start embedded system development [Copy link]

To reduce costs, improve performance and maintain flexibility, complete embedded systems including processors and peripherals are integrated onto FPGAs in a wide range of applications such as industrial, medical, automotive, aerospace and military products. Although the traditional users of FPGAs are hardware designers, Xilinx's new embedded design platform enables software developers to easily program in a familiar environment, including Eclipse IDE, compilers, debuggers, operating systems and libraries. Programming can be done at the bare metal level using an RTOS such as uC/OS-II or even a fully embedded Linux. FPGA has been used for more than 20 years. We can see various FPGA applications in various fields, such as medical, industrial control, and automotive. Songti, sans-serif]Electronics, connecting to IP, high-end display, wireless, monitoring, military communications, etc. However, the use of embedded processors in FPGAs has only been a matter of the past decade. From 1999 to the present, the use of embedded processors in FPGAs has been increasing year by year. Figure 2 EDK software, hardware, and integration process

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Figure 3 Simple SDK software development process steps As more and more embedded processors are used in FPGA designs, the challenges we face are also increasing. The main challenges can be divided into three directions: Meeting the ever-increasing technical requirements – Requires a processor system suitable for the application – Requires the ability to select the right combination of functions (peripherals) Even with little FPGA design experience, software can be developed – Requires a pre-configured system that is easy to customize Reduce schedule risk – Want to spend less time creating and debugging custom IP modules – Rapidly develop and verify hardware and software in parallel Many people have used embedded processors, but when choosing an embedded processor as the core of the system at the beginning, what are the key points to consider? A processor suitable for the application of the system and a combination that can correctly meet the peripheral function requirements will be the final choice. These conditions for selecting a processor are all challenges for FPGA embedded processing. In addition, the difficulty of FPGA hardware design must be effectively reduced so that people with less experience in FPGA design can also develop software. This is because traditional FPGA design engineers, although they have no hardware design experience, must be able to develop software, which requires an easy-to-prepare preconfigured system. In terms of schedule risk management, FPGA embedded design is particularly important. Since FPGA embedded design includes software and hardware on the same chip, when a problem occurs, hardware and software personnel cannot quickly sort out the crux of the problem, so the schedule is often delayed. Therefore, when choosing an FPGA embedded system, users often want to spend less time debugging hardware IP modules and developing and verifying software at the same time. The integration and performance improvement of software and hardware is a big challenge. Xilinx Embedded Platform The basic value of Xilinx's FPGA-based embedded platform is to meet the ever-increasing customer requirements. The embedded target reference design allows people with little FPGA design experience to quickly develop software. The embedded kit containing the target reference design Spartan-6 and Virtex-6 can effectively manage and reduce customer development schedule risks. Spartan-6 FPGA Embedded Kit Description: – This kit supports software development using the MicroBlaze soft processor and hardware processor system customization using the Spartan-6 LX45T FPGA. Components: – SP605 base board with Spartan-6 LX45T FPGA Download/Debug Cables, ,sans-serif]Power Supplies –ISE Design Suite: Embedded Edition ISE and ChipScope Pro: S6LX45T-Specific Devices Platform Studio, Software Development Kit (SDK) (Eclipse IDE) –Embedded Targeted Reference Designs MicroBlaze Processor Subsystem Design –Technical Documentation Hardware Setup Guide and Getting Started Guide In-depth hardware and software step-by-step tutorials – OS/RTOS support from ecosystem partners Linux, uC/OS-II, TreckVirtex-6 FPGA Embedded Kit Description: – The kit supports software development using the MicroBlaze soft processor and hardware processor system customization using the Virtex -6 LX240T FPGA Components: – Based on the Virtex-6 LX240T ML605 Base Board for FPGAs Download/Debug Cable, Power Supply – ISE Design Suite: Embedded Edition ISE and ChipScope Pro: Device Specific to V6LX240T Platform Studio, Software Development Kit (SDK) (Eclipse IDE) – Embedded Targeted Reference Designs MicroBlaze Processor Subsystem Design – Technical Documentation Hardware Setup Guides and Getting Started Guides In-depth step-by-step hardware and software tutorials – OS/RTOS support from ecosystem partners Linux, uC/OS-II, Treck Click on image to open in new window

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Embedded Targeted Reference Design The Spartan-6 and Virtex-6 embedded target reference designs are very similar. They both include a 32-bit MicroBlaze RISC processor, optimized for performance, supporting Linux RTOS, and a 100MHz clock frequency. They also include integrated memory controllers, including DDR, DDR2, DDR3, LPDDR, and data rates up to 800Mbps. A full set of optimized soft IP peripherals and The busstructure includes UART, Flash, GPIO, I2C/SPI, Timer/Intr Controller, and Debug. As shown in Figure 1, the reference design integrates Ethernet MAC IP, resources 100M and 1000M networks, and sub-IPs can also be integrated with external codes. The processor and processor subsystem are fully operational and easy to use, which helps to start system development immediately. MicroBlaze processor subsystem The MicroBlaze processor subsystem, called PSS (processer subsystem), is provided in the Spartan-6 and Virtex-6 embedded reference designs. system), through such a PSS subsystem, users can quickly add their own defined logic to such a subsystem. Since the target reference design MicroBlaze subsystem has integrated many peripheral functions, the logic defined by the user can be quickly controlled through the network or stored in DDR memory, which will effectively reduce the time of customers in the development process. Operation steps Improving efficiency only requires a few simple steps. The first step is to start the design within minutes, including connecting cables, turning on Development boardPower supply, load embedded platform demonstration; the second step, evaluation, including evaluating embedded platform demonstration, using interactive interface to evaluate performance parameters; the third step, customization, including starting embedded target reference design project, programming, debugging and describing software application according to software development tutorial, and making design modifications according to hardware development tutorial. After the first and second steps, users have fully understood the content of embedded target reference design, and can use embedded target reference design to add their own logic and software, use XPS for hardware development, and use SDK for software development, so that design requirements can be completed on time. EDK is Xilinx embedded development kit, and its main tool XPS is to integrate standard hardware flow ISE and standard software flow SDK. XPS itself does not implement the hardware flow, but achieves the implementation of the hardware flow by calling ISE. The hardware flow includes the standard FPGA hardware development flow. XPS does not implement the standard software flow either, but also implements the standard software flow by calling SDK. Users can describe the system through XPS, as shown in Figure 2. XPS can be called a script generator, which is a tool used to connect hardware and software flows. The steps of a simple SDK software development process are shown in Figure 3, all of which will be completed on the SDK. Start designing with the SDK Eclipse IDE Open a workspace configured specifically for the MicroBlaze PSS targeted reference design Programming Create a standalone software platform or OS BSP Create, compile, and build software applications Debug software applications using the graphical debugger The steps of a simple hardware design flow are shown in Figure 4. Start designing with XPS Start the MicroBlaze PSS Targeted Reference Design Project Modify Select other standard peripherals from the EDK suite and add them to PSS Create custom IP using the Create IP Wizard Add ChipScope debug IP using the Debug Configuration Wizard The steps to integrate and optimize software/hardware are shown in Figure 5. Use ChipScope Pro Analysis tools to debug software/hardware integration issues Use SDK to describe applications and identify hotspots Download performance critical code to hardware accelerator The mainstream third-party embedded software support includes Linux (PetaLinux), uC/OS-II and Treck network middleware. The main features are shown in Table 1. Table 1 Main features of ecosystem partners Click on the image to open in a new window sans-serif]Development boardPower on, load the embedded platform demonstration; Step 2, Evaluation, including evaluating the embedded platform demonstration, using the interactive interface to evaluate performance parameters; Step 3, Customization, including starting the embedded target reference design project, programming, debugging and describing the software application according to the software development tutorial, and making design modifications according to the hardware development tutorial. After the first and second steps, the user has fully understood the content of the embedded target reference design, and can use the embedded target reference design to add the user's own logic and software, use XPS for hardware development, and use SDK for software development, so that the design requirements can be completed on time. EDK is Xilinx embedded development kit, and its main tool XPS integrates standard hardware flow ISE and standard software flow SDK. XPS itself does not implement hardware flow, but achieves the realization of hardware flow by calling ISE. The hardware flow includes the standard FPGA hardware development flow. XPS does not implement standard software flow either, but also implements standard software flow by calling SDK. Users can describe the system through XPS, as shown in Figure 2. XPS can be called a script generator, which is a tool for connecting hardware and software flow. The simple SDK software development process steps are shown in Figure 3, which will all be completed on SDK. Start Designing with the SDK Eclipse IDE Open a Workspace Configured for the MicroBlaze PSS Targeted Reference Design Programming Create a Standalone Software Platform or OS BSP Create, Compile, and Build Software Applications Debug Software Applications with the Graphical Debugger The steps of a simple hardware design flow are shown in Figure 4. Start Designing with XPS Start the MicroBlaze PSS targeted reference design project Modify Select other standard peripherals from the EDK suite and add them to PSS Create custom IP according to the “Create IP Wizard” Add ChipScope debug IP according to the “Debug Configuration Wizard The steps to integrate and optimize the software/hardware are shown in Figure 5. Debug software/hardware integration issues with the ChipScope Pro analysis tool Use the SDK to describe the application and identify hot spots Download performance critical code to the hardware accelerator The mainstream third-party embedded software support includes Linux (PetaLinux), uC/OS-II, and Treck network middleware. The main features are shown in Table 1. Table 1 Main features of ecosystem partners Click on the image to open in a new window