SoC front-end (ARM) embedded system development practice training (Part 2)

Introduction: In the RISC reduced instructions, it contains multiple meanings, so it is difficult to understand. However, under the full transparency of the debugger to the CPU, you can clearly see the execution of instructions and deepen your understanding of the CPU. In order to watch the execution of instructions and assembly language, we will open a window to explain the meaning of each window.

Instruction Execution

In the RISC simplified instructions, it contains multiple meanings, so it is difficult to understand. But under the full transparency of the Debugger to the CPU, you can clearly see the execution of instructions and deepen your understanding of the CPU. In order to watch the execution of instructions and assembly language, we will open a window to explain the meaning of each window. First, connect ICE and Creator, and execute the Domingo program as shown in Figure 1 and Figure 2.

Figure 1 Wiring diagram of Pocket ARM ICE and Creator

Figure 2 Domingo IDE window

Example

Type the following commands under command to see the results of each command execution. Although you don't know much about the commands, after executing them, the window will display the information of changes (red values), and you will understand why.

STMIAR0, {R1-R5}

After executing this instruction, the contents of registers R1~R5 will be stored in the memory address pointed to by register R0.

Register value

Memory changes

Program Execution

Take the keypad and 7-seg as an example, download a ready-made program in the project to watch its execution, and press keys on the keypad to watch the changes of the 7-seg. After watching it, I found that it is not unfamiliar, and it is similar to 8051. I was just surprised that the Domingo operating environment has a human-computer operating interface that is completely different from the early ICE.

User Interface

The main program contents in the above figure are as follows:

int main(void)

{

__enable_interrupt();

Initial_Creator();

EnableInterrupt(BIT_GMASK);

while (1)

{

UC ch;

while(KEYPAD_get_key(&ch) != OK);

for (i=0;i<1000;i++)

{

_7SEG_put_led(1,0);

_7SEG_put_led(2,0);

_7SEG_put_led(3,0);

_7SEG_put_led(0,ch);

}

}

DisableInterrupt(BIT_GMASK);

return(0);

}

After using the debugload module to load the program that has been compiled, executing free go can test the correctness of the program and perform debugging.

Program creation and compile process

1. Create a project

Create projects to manage your related programs and save customized working environments.

2.Edit

Open the Editor to edit a newly created program or open an existing program. Of course, this can be an Assembly or C language program.

3.Compile

Domingo IDE supports external compiler programs. Through some simple configuration steps, you can directly execute compile and link to build your project in this integrated interface, or use make to build only the changed parts to increase the speed. If you find an error during the compile process, you can also double click on the error message to quickly jump directly to the source code location where the error occurred for easy debugging.

4. ICE connection

Of course, in addition to the hardware wiring, you also need to execute connect in Domingo to correctly connect to ICE, and then the control of the target board will be handed over to ICE.

5.Download

Download the compiled program file to the RAM area of ​​the target board. Domingo supports debug files in multiple formats, so even external debug files that are not integrated into the Domingo interface can be downloaded.

6.Debug

With the support of Domingo's powerful debugging function, I believe this will not be a big problem. However, it is the most important part. Without the support of good tools, this will be the most time-consuming part of your entire development project.

7. Burn

The program is completed. If necessary, it can be burned directly into ROM through ICE after modifying some memory locations.

8. Independent Testing

Well, the ICE has completed its task! You can now detach the ICE from the target board and let the system board run independently. Test it to see if it works. The whole process seems to be similar to the previous 8-bit 8051 method, but in fact, there are many tricks inside. If you want to advance to 32-bit development, it will be difficult without a good debugger and ICE.

System Management

This is the difference between 32-bit ARM CPU and 8051. A single CPU core cannot be moved. It needs to be added with some peripheral resources to move, such as ROM area for programs, RAM area for data, BUS connection method, cache/buffer status. These resources must be set up before the CPU can be started to execute instructions. The following is a description:

A microcontroller containing an ARM core will have a system manager to manage all peripheral resources provided by the system. Its main functions are as follows:

˙Arbitrate peripheral priority: Since ARM microcontrollers provide many peripheral functions, multiple peripherals may request access at the same time. At this time, the system administrator will arbitrate the system bus access requests of several peripherals according to the fixed priority order in the controller.

˙Memory control signals required: Provide memory control signals required when accessing memory. For example, when the DMA controller or CPU generates an address corresponding to a DRAM bank, the system manager's DRAM controller will generate the required standard/EDO access signals or SDRAM access signals.

˙Control signals required for I/O: Provides signals required for bus transmission between ROM/SRAM or external I/O banks.

˙Compensation for internal/external bus width differences: Compensation for data flows with different bus widths between the external memory bus and the internal data bus.

As for the system memory management, the location and size of each memory bank are determined by the settings of the current bank base pointer and the current bank end pointer. Therefore, we can use the concept of base bank pointer/next bank pointer to establish a continuous memory response. This concept is to set the base pointer of the next bank to the same address as the end pointer of the current bank. However, one thing that must be noted is that these continuous addresses cannot overlap.

In the addressable space, the starting addresses of various banks are not fixed. We can use the system register to configure a bank starting address as the base pointer of the bank. The resolution of this address is 64K byte, so the starting address of the bank will be defined as "the base pointer shifted left by 16 bits", and the end address of the bank will be "the address value of the next pointer shifted left by 16 bits minus 1".

However, after power-on or reset, the adress pointer registers controlling all banks are initialized to default values; in this case, all bank pointers except the next pointer of ROM bank0 are set to 0. This means that all banks except ROM bank0 will be in an undefined state after the system starts.

The next pointer and base pointer of ROM bank0 will be 0x200 and 0x000 respectively after reset. This means that after reset, the system will automatically define the starting address of ROM bank0 to start from 0 and have a total of 32Mbytes of space. The algorithm is as follows:

base point = 0x000

next point = 0x200

Therefore, the address range of ROM bank0 is 0x000 0000 ~ 0x1ff ffff (32Mbyte)

The calculation method is:

Starting address = 0x000, shifted left 16 bits, so 0x000 0000

End address = 0x200, shift left 16 bits - 1, so 0x200 0000-0x1 = 0x1ff ffff

After the system starts, it will start from the address 0x0, so the initial definition of ROM bank0 is to enable the system to control the boot code stored in the external ROM provided by the user so that the system can start correctly. The action content of the boot code will be written according to the user's required planning. Generally, it will do system initialization and reconfigure the system memory map according to the actual external memory application and peripheral device configuration.

Figure 3 System memory map after reset

In order to control peripheral functions and memory operations, system administrators use some dedicated special register sets (as shown in Table 1) for control and management. By planning the values ​​contained in these special registers, the following can be explained:

Memory Type

˙External bus width access cycle

˙Control signal timing (such as RAS and CAS)

˙Memory bank location

˙The size of the memory bank can be used in any address space

The address resolution of each memory bank base pointer is 64Kbyte (16 bits in total), and the base address pointer is 10 bits, so the entire addressable memory space is 16Mword=64Mbyte (as shown in Table 2).

Table 1 System Manager Registers

Table 2 Basic memory bank address composition

PCM

In Domingo, PCM is used to set this system function. Because the hardware designed by each person is different, if it is not set correctly in PCM, Domingo will not be able to access the program instructions correctly. Just like when you are coding a program, you must initialize these corresponding values ​​at the beginning so that the CPU can operate correctly.

The memory system (especially DARM) of the ARM-based embedded system usually needs to go through a series of setup operations before it can be used. If the user has to manually perform the above memory initialization work before downloading the program to the memory every time using ICE, it is really a very tiring task. The PCM command can perform the above routine setup work for the user.

There are two ways to open the PCM settings window:

■Use configRconfig PCM.......command

■Use the configRHardware Options command

Enter the Hardware Options window and press the Config PCM... button.

Figure 4 PCM window

The following describes the functions of the buttons in the PCM window.

■Import

Load a previously saved PCM file

■Export

Save the current PCM settings to the specified file.

Move Up

Move the selected setting row up one row.