From June 25 to 26, the fifth Jiwei Semiconductor Summit was held in Xiamen, with the theme of "The Heart and the Core are in the Same Place, Changes are Like Kunpeng". At the EDA/IP sub-forum held on the 26th, Yang Ye, Director of Product and Business Planning of Xinhuazhang Technology, delivered a speech entitled "EDA 2.0: New Technologies and New Ecosystems for the Future", sharing the new EDA service model from the perspective of a domestic EDA (integrated circuit design tool) developer.
X-EPIC was founded in March 2020 and is headquartered in Nanjing. Its chairman and CEO Wang Libin is the former vice president of Synaptics China. The company is committed to the research and development of a new generation of EDA software and intelligent electronic design platforms. With intelligent debugging, intelligent compilation, and intelligent verification cockpit as the three major bases, it provides comprehensive coverage of digital chip verification needs, including hardware simulation systems, FPGA prototype verification systems, intelligent verification, formal verification, and logic simulation. Five major product lines provide partners with chip verification solutions and expert consulting services.
Yang Ye pointed out in his speech that a series of phenomena, such as automobile manufacturers participating in the Consumer Electronics Show, consumer electronics manufacturers participating in the Auto Show, and mobile phone manufacturers making chips, indicate that the system is integrating with algorithms, software, and chips. This means that the scientific research paradigm is undergoing a profound change, and future demand will be driven by system applications. Chips must be a combination of system + chip + algorithm + software, which is the main theme of chip development in the next 10 or even 20 years.
He mentioned that application innovation drives software innovation, and software algorithm iteration brings about the demand for new chips, followed by chip design and manufacturing. After successful verification of chip manufacturing, the hardware and software integration phase begins. This is the current cycle of chip design by system manufacturers. However, in this cycle, chip design and manufacturing and hardware and software integration are cycles in years, while software algorithm iteration is a cycle in weeks, and the two are obviously mismatched. This is the dilemma facing current system manufacturers in chip design.
Yang Ye pointed out that system manufacturers face four major challenges in designing chips. First, the design cycle is long and cannot meet the needs of system innovation; second, the EDA design process lacks connection with system-level software and hardware requirements; third, the design investment is large, the cost is high, and the project risk is high; finally, it is necessary to build a large-scale team, which is highly dependent on experience and talent is hard to find. These challenges will only grow in the future, because general-purpose chips will develop more and more slowly with the evolution of technology, and higher requirements will be placed on chip customization.
Data shows that in the past 20 years, the scale of chip design has increased tens of thousands of times. Thanks to the advancement of technologies such as EDA, the cost increase is much lower than the chip scale, but the cost has also increased 100 times. As chip technology evolves, the problem of rapid increase in chip scale and cost will become more and more prominent. At the same time, there has been no revolutionary change in chip design methodology. The development of EDA since 2000 has only been an incremental improvement. From the perspective of abstraction level and design methodology, there has been no major change.
In order to change this situation, Xinhuazhang pioneered the EDA2.0 that supports system manufacturers to customize chip design. In Yang Ye's view, only by achieving the four goals of using tools to fill the gap between software and hardware, automatic and intelligent processes, open service platforms, and shortening the cycle from chip demand to application, can it be called the next generation of EDA, namely EDA2.0.
Yang Ye believes that EDA 2.0 has three key implementation paths, namely more open EDA, intelligent EDA and cloud-based EDA. More open EDA means open tool interfaces and data, smoother processing flow, and requires open IP interfaces and models. Intelligent EDA means reducing manual input in existing processes and making tools smarter. Cloud-based EDA is a combination with the cloud, which is an inevitable trend.
According to reports, EDA 2.0 is no longer a combination of tools, but a complete service-oriented and customizable platform. EDaaS can directly serve different application needs, support rapid design and deployment of chip products, achieve a more efficient and simpler application innovation cycle, lower the threshold of chip design, enable system innovation, and define the smart future from the core. At the same time, open EDA2.0 will also bring new changes to the business model.
The ultimate goal of EDA2.0 is to make the innovation process from chip to system smoother, which is also the advantage of China. China lags behind in many basic modules such as materials and manufacturing, but my country has a developed system industry, which can reversely drive chip design, manufacturing, EDA, etc., and finally create a system innovation process.
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