Haowei Technology: Providing basic computing power for the future digital world

With the development of various technologies such as artificial intelligence, autonomous driving, 5G, and cloud computing, massive amounts of data will continue to be generated. In order to process massive amounts of data, it is difficult to meet the needs based on traditional computing architecture. In this context, more powerful chip processing capabilities, especially high-bandwidth and high-computing chip technology, have begun to become the "focus".

Founded in 2019 and headquartered in Hangzhou, Haowei Technology has branches in Shanghai, Shenzhen and other places. The company is positioned to provide ubiquitous computing power based on its pioneering Nano FPU (stream processor) architecture for the future digital world.

It is reported that the Nano FPU architecture is a global first of its kind by Haowei Technology. Its logical core structure includes multi-core, heterogeneous computing cores, Intelligent-NOC on-chip network, distributed SRAM and storage units consisting of high-bandwidth and low-latency DRAM.

Different from CPU, GPU and TPU, Nano FPU aims to optimize data transmission, transmitting data streams instead of data of a single structure. FPU performs parallel computing in the operation stage instead of centralized computing, and also performs shard storage in the storage stage instead of centralized storage.

In addition, Nano FPU has four major characteristics: good design reusability, strong scalability, and easy reconstruction in new chips; high data movement efficiency within the architecture and low power consumption; data parallel processing, low latency, and high bandwidth; and strong software and hardware collaboration capabilities.

It is worth mentioning that in May this year, Haowei Technology successfully mass-produced the first product of Nano FPU technology, the Cuckoo chip. The Cuckoo chip uses FPU-2D technology, consumes 100W of power, has the world's first C32 computing power, and has a size of 37.5mm x 37.5mm, containing 30,000 microspheres. At the same time, the Cuckoo chip also uses TSMC's 22nm process and integrates more than 5 billion transistors. After actual testing, the performance of the Cuckoo chip in large-bandwidth algorithms has reached more than ten times that of traditional architecture GPUs, and is incomparable to traditional CPUs such as Intel i7.

The pioneering of FPU technology and the mass production of Cuckoo chips are inseparable from the support of the core R&D team. Haowei Technology has a chip SoC team of more than 40 people, and has worked for IBM, Cadence, MTK, Trident, Synopsys, Fujitsu, Hygon, AMD and other expert teams. The core R&D team has been deeply engaged in the field of large-scale SoC for many years. All of them have a master's degree or above and graduated from first-class universities such as Tsinghua University, Shanghai Jiaotong University, University of Science and Technology of China, and Zhejiang University. They are committed to providing high-bandwidth, high-performance dedicated processor chips and solutions for core networks, autonomous driving, artificial intelligence, privacy computing and other fields in the future.

Although the technical difficulty, R&D cycle, and capital investment of large chips are more challenging than those of conventional products, Haowei Technology believes that high-bandwidth and high-computing chips will be a long-term demand of the market in the future, and the market size will continue to expand. Haowei Technology will plan the development of chips from the perspective of long-term layout.

Next year and in the future, Haowei Technology plans to launch upgraded FPU-3D and more products, targeting data centers, privacy computing, autonomous driving, artificial intelligence and other market directions, to provide users in various scenarios with a better computing experience. The mission of Haowei Technology's Nano FPU is to provide basic computing power for the future digital world.