Design of video on demand set-top box based on PC

    Abstract: The design of video on demand (VOD) set-top box in CATV network environment is proposed. The set-top box is composed of five major modules: digital tuner, QAM digital demodulation chip, MPEG-2 demultiplexing chip, I2C bus controller and interface circuit. It is implemented by a PC plug-in card, which runs under the Windows 95 environment. The virtual device driver supported by its software completes the communication between the plug-in card and the microcomputer. Through multiple debugging and experiments, it was able to successfully achieve normal reception of video services.

    Keywords: Set-top box QAM demodulation MPEG-2 demultiplexing interface circuit virtual device driver

The set-top box is the terminal device of the video on demand (VOD) system and is the intelligent interface between the user and the VOD server. It is used for receiving video services and sending user requests. Therefore, data transmission in the VOD system is divided into two channels: the downlink channel is used to transmit video information to users; the uplink channel is used to transmit users' on-demand needs to the sender. PC-based set-top boxes make the functions of the set-top box into the form of ordinary PC plug-in cards, and use computers to realize all functions of video on demand. There are several advantages to doing this:

(1) Make full use of the software and hardware resources of the computer, thereby reducing the cost of user terminal equipment;

(2) Good compatibility and can adapt to different access networks and different types of services;

(3) The software is easy to maintain and upgrade and adapts to future development;

(4) A user interface that is easy to operate, beautiful and based on Windows95/98 can be designed.

The set-top box is composed of two ordinary PC plug-in cards, which respectively complete the reception of downlink data and the transmission of uplink data. The transmission of uplink data is accomplished by a built-in MODEM card through the telephone line, and the reception of downlink data is accomplished by another plug-in card through the CATV network.

The main content of this article's research is how to achieve normal reception of downlink data on a microcomputer. To this end, a set-top box design scheme with a digital tuner, the latest QAM digital demodulation chip and a high-performance MPEG-2 demultiplexing chip as the core is proposed. In the hardware design of the set-top box, advanced I2C bus technology, QAM digital demodulation technology, MPEG-2 demultiplexing technology, FIFP memory technology and general ISA bus interface technology are used; in the software design, VC++ programming technology is used And the technology of using VtoolsD to develop virtual device driver (ie VxD) under Windows95/98 environment.

1 Hardware design of set-top box

The main function of the set-top box is to provide people with a unique way to access VOD services and provide a friendly interface for legitimate users. The overall hardware block diagram of its receiving part is shown in Figure 1.

In Figure 1, the downlink data from the CATV network realizes frequency point selection through a digital tuning circuit. The data stream at a certain frequency point contains the data of more than a dozen programs. These data have passed the MPEG-2 standard at the sending end. System reuse. This circuit outputs an intermediate frequency signal, and then the analog/digital conversion circuit outputs a digital signal as the input of the QAM demodulation circuit. The frequency selection and QAM demodulation in the above process are controlled by the microprocessor via the I2C bus.

The digital signal after QAM demodulation is sent to the MPEG-2 demultiplexing circuit to realize channel selection, that is, to select a program requested by the user. The program's data is in the compressed form of the MPEG-1 standard. In order to save costs and simplify the circuit, and taking into account the high speed of current microcomputers and the Windows95 operating system, this design does not use hardware decompression, but transmits the data to the computer's memory through the host interface circuit in DMA transmission. , use software methods to decompress the program in real time and play it out.

The above entire circuit can be divided into several relatively independent modules, which are introduced separately below.

1.1 Digital tuning circuit[1]

The digital tuning circuit is actually a tuner. Its function is to receive the downlink data from the CATV network and implement frequency selection according to the instructions of the microprocessor (similar to the analog circuit). The data stream at a certain selected frequency point still contains digital signals of multiple programs, and each user only watches the program at a certain frequency point. Frequency selection is controlled by the microprocessor through the I2C bus. The connection between the digital tuning circuit and the subsequent stage circuit is shown in Figure 2.

1.2 A/D video conversion circuit[2]

The amplitude of the analog intermediate frequency signal output by the tuner has met the input requirements of the A/D converter, so it is directly sent to the A/D converter for digitization for further processing by the subsequent digital circuit. The analog/digital converter uses a Philips chip, which converts analog video signals into binary-encoded digital video signals. The connections of the A/D conversion circuit are shown in Figure 2.

1.3 QAM demodulation circuit[1-2]

The QAM demodulation circuit is one of the key points and difficulties in the receiving part of the set-top box, and the selection of the chip is very important. Its function is to perform QAM demodulation and other processing on the digital signal output by the A/D video conversion circuit and then output the baseband digital signal.

The QAM demodulation circuit uses the latest QAM digital demodulation chip. The chip is powerful, fully digitally processed, and does not require a feedback loop outside the chip. It supports frequency decoding of 16, 32, 64, 128 and 256QAM. In order to realize the powerful functions of the chip, there are a large number of control/configuration registers inside for user programming. These registers can be read or written through the I2C bus or parallel bus. The chip outputs the error-corrected MPEG-2 transport stream.

The tuning circuit, A/D video conversion circuit and QAM demodulation circuit introduced above form a relatively independent whole. Their application circuit frame is shown in Figure 2.

1.4 I2C bus control circuit [3～4]

In the above circuit, the frequency point selection of the tuning circuit and the read and write operations of a series of registers inside the QAM demodulation chip are controlled by the microprocessor through the I2C bus. There is no I2C bus interface in the microprocessor chip, so the I2C bus control circuit needs to be designed. The circuit is composed of the I2C line controller chip PCF8584, which can be used as an interface for bidirectional communication between most parallel buses and the serial I2C bus. It can be used to easily connect the microprocessor to the I2C bus and realize data transmission and control between chips.

The connection method between the I2C bus control circuit and other circuits is shown in Figure 3.

1.5 MPEG-2 system demultiplexing circuit [1～2][5]

In the video on demand system, the program source at the sending end is based on the MPEG-1 standard data stream, which is only suitable for relatively error-free environments, such as the transmission of CD-ROM and VCD. In order to adapt to the transmission of noisy or lossy media channels, multiple MPEG-1 format code streams of different programs need to be transmitted and multiplexed according to the MPEG-2 standard. Therefore, the receiving end needs the support of the corresponding MPEG-2 demultiplexing circuit.

The MPEG-2 demultiplexing circuit uses a high-performance MPEG-2 system demultiplexing chip. After receiving the MPEG-2 system transmission code stream, the chip demultiplexes the transport layer and PES (Packetized Elementary Stream) layer to provide a certain code stream buffer, and its output is sent to the host interface circuit, and its application circuit The block diagram is shown in Figure 3.

1.6 Computer interface circuit design [6～8]

In this design, the computer interface circuit has two major tasks: First, the microprocessor realizes control and access to the tuning circuit, QAM demodulation circuit, and MPEG-2 demultiplexing circuit through the interface circuit in order to complete multi-channel program data The second is that the interface circuit transmits one channel of program data output by the demultiplexing circuit to the computer's memory, so that the microcomputer can decompress it by software and play it out.

As can be seen from Figure 3, the microprocessor's access and control to the tuning circuit and QAM demodulation circuit are realized through the I2C bus controller chip PCF8584, while the microprocessor's access and control to the demultiplexing circuit is directly through the demultiplexing chip. Microprocessor interface implementation. In addition, the program data output by the demultiplexing chip needs to be transmitted to the memory of the microcomputer through the interface circuit. In order to be suitable for real-time, high-speed or burst data transmission, the interface circuit adopts DMA transmission technology and uses FIFO (First In First Out) memory as a data buffer circuit. Since FIFO has a certain storage capacity and can play a buffering role, it can well solve the problem of rate matching between peripherals and computers. In addition, when the peripheral device performs continuous data transfer, the host's DMA transfer can be performed intermittently, allowing the host time to perform background tasks such as data processing and display.

2 Software design of set-top box

In the set-top box, the software design mainly includes three parts: the reading and writing operations of each chip. Interface software programming and user interface design. The chips of digital tuning circuits, QAM demodulation circuits, I2C bus controllers and MPEG-2 demultiplexing circuits all contain a large number of control and configuration registers for users to read and write in order to preset relevant parameters or modify certain parameters. Take control. This needs to be achieved through programming. The user interface of the set-top box is a typical WINDOWS interface. All functions of the set-top box (including decompression) are completed through it, so it can be programmed using VC++. The function of the interface software is to transfer the data received by the plug-in card to the computer's memory in DMA mode. To realize data transmission in DMA mode under Windows95/98, a virtual device driver needs to be written. This is the key point and difficulty in the entire software design. Due to space limitations, the following briefly describes the design ideas of the virtual device driver.

The DMA virtual device driver is written in VtoolsD and can be dynamically loaded by Win32 applications. The driver is responsible for transferring the data in the peripheral device to two buffers in the memory through DMA, and the application program reads data from the two buffers in turn. The implementation method is as follows:

The entrance of the driver is a function called Control Dispatcher, which is responsible for processing the system control information related to the VxD and calling the corresponding processing routine. A passively loadable VxD should be able to handle the following messages: SYS_DYNAMIC_DEVICE_INIT (for the initialization phase of the VxD); SYS_DYNAMIC_DEVICE_EXIT (for the exit phase of the VxD); W32_DEVICEIOCONTROL (for communication with the application VxD). When a Win32 application uses the function CreateFile to dynamically load VxD, the system sends the SYS_DYNAMIC_DEVICE_INIT message, and the Control Dispatcher calls the message processing routine OnSysDynamicDeviceInit to initialize the VxD, such as the initialization of the DMA controller, allocating memory space, and interrupting the controller. Initialization, etc. When a Win32 application calls the DeviceIoControl function to send data to VxD, Control Dispatcher calls the message processing routine OnW32DeviceIoControl. At this time, it can receive messages sent from the application, such as the main window handle, etc. When the Win32 application closes the VxD or the Win32 application itself is closed, Control Dispatcher calls the message processing routine OsSysDanamicDeviceExit. At this time, some cleanup work can be done, such as releasing the DMA buffer.

Whenever a DMA transfer ends, a hardware interrupt is generated. In the VxD interrupt handling routine, re-initialize the DMA controller (that is, change the first address of the DMA buffer to point to another buffer to start the next DMA transfer), and at the same time send a message to the Win32 application to notify it Read data from memory.

3 Experimental results

The above set-top box circuit is made into a PC plug-in card for receiving downlink data. First, each module in the circuit was debugged and tested several times. Then, on this basis, the entire circuit was jointly debugged using the program source for testing (that is, the code streams of multiple different programs after transmission and multiplexing in accordance with the MPEG-2 standard). It can realize frequency selection, QAM demodulation and channel selection, so as to obtain a certain program that the user wants. The data stream format of this program complies with the MEPG-1 standard, and the rate is approximately 1.4Mb/s. Finally, the written virtual device driver is used to successfully transfer the program to the computer's memory through the interface circuit. Write a Win32 application for debugging, read the program data in the memory and form a data file, which is then played by Kingsoft Video Player. The effect is good.

Based on the existing work in this article, the next step will be to focus on the following aspects:

(1) Programming of software decompression and playback program.

(2) Communication debugging between the software decompression player program and the virtual device driver.

(3) User interface design and programming.