FPGA mezzanine card I/O design based on FMC standard

With a seemingly endless supply of new I/O standards, it is no surprise that embedded system designers continue to rely on FPGAs to implement their systems’ increasingly important external I/O interfaces. FPGAs offer a large number of configurable I/Os that can support an almost unlimited number of highly complex I/O standards based on the appropriate IP. Designers can also use FPGAs to perform in-stream data processing, even protocols that run at multi-gigabit signaling rates and bandwidths.

FPGAs have the flexibility to adapt to changing I/O requirements. New protocols can be implemented by reconfiguring the FPGA with little to no changes other than replacing the physical I/O components and connectors. This means modifying the board design if the I/O is not implemented on a mezzanine module. To avoid the cost and effort of design changes, designers have historically used the PCI Mezzanine Card (PMC) and Switch Mezzanine Card (XMC) standards. However, these standards were developed more than a decade ago for general-purpose solutions such as single-board computers (SBCs), not FPGAs. This changed in July 2008 when the American National Standards Institute (ANSI) approved the release of the VITA 57 FPGA Mezzanine Card (FMC) standard.

The FMC standard was developed by a consortium of companies including FPGA vendors and end users to provide a standard mezzanine card size, connector, and module interface for FPGAs on base boards (carrier cards). Separating the I/O interface from the FPGA in this way not only simplifies the I/O interface module design, but also maximizes the reuse of carrier cards. Unlike the PMC and XMC standards that use complex interfaces such as PCI, PCI-X, PCIe, or Serial RapidIO to connect to the carrier card, the FMC standard only requires the core I/O transceiver circuit to be directly connected to the FPGA on the carrier card.

这样做能够提高效率，进而带来诸多显著优势：

Data Throughput: Supports signaling rates up to 10 Gb/s, with a potential total bandwidth of 40 Gb/s between the mezzanine and carrier cards.

Latency: It eliminates protocol overhead, avoids latency issues, and ensures deterministic data delivery.

Simplifies design: No expertise in protocol standards such as PCI, PCI Express, or Serial RapidIO is required.

System Overhead: Reduces power consumption, engineering time, IP core and bill of materials costs by simplifying system design.

Design Reuse: Whether using a custom in-house board design or a commercial off-the-shelf (COTS) mezzanine or carrier card, the FMC standard enables the reuse of existing FPGA/carrier card designs to new I/Os by simply replacing the FMC module and making minor adjustments to the FPGA design.

Highlights of the FMC Standard

The FMC standard defines two sizes: single width (69 mm x 76.5 mm) and double width (139 mm x 76.5 mm). Single width modules support a single connector to the carrier card. Double width modules are targeted at applications that require higher bandwidth, more front panel space, or a larger PCB area and support up to two connectors. The FMC standard provides two sizes, which allows for greater flexibility to optimize the board based on space, I/O requirements, or both. Figure 1 shows a schematic diagram of an FMC carrier card and various FMC mezzanine cards.

Figure 1: FMC carrier card and various FMC mezzanine cards

Once the form factor is chosen, the board designer then has to choose between two different connectors for the FMC standard to interface to the FPGA on the carrier card: a low pin count (LPC) connector with 160 pins, and a high pin count (HPC) connector with 400 pins. Both connectors support single-ended and differential signaling rates up to 2 Gb/s, and signaling rates up to 10 Gb/s to the FPGA serial connector.

In addition to 68 user-defined single-ended signals or 34 user-defined differential pairs, the LPC connector also provides a serial transceiver pair, clocks, JTAG interface, and an I2C interface with optional support for basic Intelligent Platform Management Interface (IPMI) commands. The HPC connector provides 160 user-defined single-ended signals (or 80 user-defined differential pairs), 10 serial transceiver pairs, and more clocks.

Both HPC and LPC connectors use the same mechanical connector, the only difference is which signals are actually ported, so a card with an LPC connector can also plug into an HPC, and if designed properly, an HPC card can provide many derived functions when plugged into an LPC.

Figure 2 shows an example board from Xilinx that uses a Virtex'-6 FPGA and two FMC connectors (one LPC and one HPC).

Figure 2: ML605 evaluation board

The FMC standard supports many existing industry-standard carrier card form factors, including VME, CompactPCI, VXS, VPX, VPX-REDI, CompactPCI Express, AdvancedTCA, and AMC. The FMC standard also defines a range of environmental configurations, including low-cost commercial-grade form factors and even enhanced conduction cooling options.

Market opportunities for FMC

Combining the FMC standard with the diversity of FPGAs opens up a host of interesting market and application opportunities. Markets such as aerospace and defense, medical, industrial, telecommunications, video, and others often rely heavily on FPGAs to achieve their digital signal processing (DSP) price/performance advantages and to meet a variety of different I/O requirements. However, in the past, each market and each application within a given market required a different board design.

The emergence of the FMC standard modularizes board design into two parts: the processing engine (carrier card) and the I/O engine (FMC module). Designers can now reuse a single carrier card (including one or more FPGAs and the appropriate number and type of FMC connectors and boards) as the basis for a variety of different markets and applications. In addition, with new FPGA products with higher performance and more powerful functions, designers can easily upgrade to new carrier cards while ensuring full compatibility with existing FMC modules.

A quick look at the size, I/O, and processing requirements for some of these markets shows where the problem lies. For example, broadcast video applications typically require access to 4 or more SDI connectors, 10 Gb Ethernet, and other transceiver connectors; for wireless base station applications, baseband processing is typically done on 3.125" 10 Gb/s ATCA/AMC size boards, which requires a combination of FPGAs and traditional DSPs, and high-speed I/O (100" 500 MHz, 12" 16-bit resolution) on the radio front end; the aerospace and defense market tends to use VME and cPCI size boards, but the processing requirements are very different. For example, radar processing has sampling rates similar to radio applications, but typically higher resolutions. Military satellite base station applications typically use higher sampling rates, but lower resolutions (8" 14 bits).

Obviously, the processing and I/O requirements vary widely from just a few of the applications we have mentioned, so we can imagine how different the needs of different applications using FPGAs will be. Although the different processing requirements of these applications are relatively well understood and supported by the rich hardware solutions provided by the mature board industry, engineers have previously been forced to spend a lot of valuable design time creating custom hardware or dealing with complex (and often unnecessary) bus protocol issues.

FMC 标准将 FPGA 与 I/O 引擎相分离，从而解决了上述问题。它使设计人员能从专门支持其终端应用的大量 COTS 产品中选择适当尺寸的适当处理引擎和适当的 I/O 引擎。此外，FMC 标准还使厂商能为评估和开发创建统一的系统，随后还能量产部署，从而大幅降低成本，并显著缩短了产品上市时间。

Summarize

The FMC standard is a major shift in design choices for FPGA developers. Designers working on microprocessors and traditional DSP designs have benefited from the flexibility of scalable development solutions for decades, but now the FMC standard brings the power of modular design to developers in the FPGA space.

COTS board vendors can speed up and simplify product design by reusing hardware designs, which can significantly reduce product costs. This efficiency not only helps us launch better products for more applications, allowing customers to focus on achieving their unique product differentiation, but also accelerates the market deployment of solutions.