Design and application of a high-speed digitizer module based on PXI

PXI bus is a new generation of instrument bus implemented by NI based on PCI, a computer peripheral bus. It has become the industry's open bus standard. The digitizer module based on PXI bus is an important data recording and processing device in modern test systems. A dual-channel 12 bit/250 MHz sampling frequency high-speed digitizer module is designed. With high-performance FPGA devices as the core, it realizes the control of high-speed A/D and high-speed data processing and storage, solving the test problem of long-term high-speed recording signals.

1 System Working Principle

The digitizer module is mainly composed of front-end signal conditioning path, analog-to-digital conversion circuit, data storage unit, data acquisition control circuit, PXI interface circuit and other parts. Its principle block diagram is shown in Figure 1.

The high-speed analog signal is first amplified and attenuated through the signal conditioning path, and the amplitude is adjusted to the voltage range allowed by the A/D converter, and converted into a differential signal in LVDS format, and then sent to the A/D converter; the FPGA chip receives the high-speed data stream output by the A/D, and after processing such as speed reduction, extraction and filtering, it is stored in the data storage unit SRAM, and an interrupt signal is issued. After the PXI host responds to the interrupt, the data stored in the SRAM is read into the host memory via the FPGA to complete the subsequent data processing and display. The PXI host sends control commands through the PXI bus, and after decoding by the FPGA, it realizes the control of data acquisition and conditioning paths. The digitizer module reserves 4Mb of storage capacity for each channel. When forming a PXI test system, the data can be written to the computer hard disk to achieve longer recording. The two channels can work independently or be related to each other. The acquisition method can have multiple modes such as internal triggering, external triggering, software triggering, and channel triggering. [page]

2 System Design and Implementation

2.1 Modular FPGA Design

The digitizer designed in this paper is based on a high-performance FPGA chip. FPGA undertakes most of the control and data processing tasks and is the core device of this design. Modular design of FPGA is a common method for large-scale system design. Reasonable division of functional modules can speed up the development of FPGA and is also conducive to the transplantation and reuse of codes. During the design, FPGA is divided into main functional modules such as high-speed A/D interface module, data speed reduction module, conditioning channel control module, storage interface module, PXI interface control module, etc. The internal module division and data flow of FPGA are shown in Figure 2.

The A/D interface module mainly realizes the interconnection between FPGA and high-speed A/D converter, and receives data and sampling clock in LVDS format bus. This part of the circuit determines the stability of data acquisition and needs to be guaranteed from both hardware and software aspects; the data speed reduction module uses an extraction filter to reduce the signal to the required sampling rate; the conditioning path control module mainly realizes the control of the A/D front-end circuit, including coupling mode, matching impedance selection, automatic gain control, bias and trigger level control, etc.; the PXI interface part mainly realizes communication decoding with the PXI host; the storage control module completes the control of the external SRAM and realizes data caching; the clock management module is responsible for the frequency division and multiplication of the sampling clock.

2.2 High-speed data acquisition and storage interface design

The design of input and output interfaces of high-speed data acquisition systems is particularly important. The interconnection of high-speed IC chips is one of the key factors that determine the stability of data acquisition systems. Low power consumption and high signal-to-noise ratio are the main issues to be solved. There are usually two interfaces for interconnecting chips in high-speed acquisition systems: PECL and LVDS. The positive voltage emitter coupled logic PECL (Positive Emitter-Coupled Logic) signal has a small swing and is suitable for serial or parallel connection of high-speed data. The connection between PECL generally adopts DC coupling, and the output is designed to drive a 50 Ω load to (VCC -2V). The connection circuit is shown in Figure 3.

The LVDS (Low Voltage Differential Signal) standard is a small amplitude differential signal technology that uses very low amplitude signals (100-450 mV). Data is transmitted through a pair of parallel PCB traces or balanced cables. The currents flowing through the two parallel differential signal lines are in opposite directions, and the noise signal is coupled to the two lines at the same time. The receiving end only cares about the difference between the two signals, so the noise is canceled out. Since the electromagnetic fields around the two signal lines also cancel each other out, the electromagnetic radiation of differential signal transmission is much smaller than that of single-line signal transmission, thereby improving transmission efficiency and reducing power consumption. The input and output of LVDS are internally matched, and a direct connection method is sufficient. The connection method is shown in Figure 4.

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In this design, the A/D converter uses Mamix's MAXl215, which is a 12 bit/250 Ms/s high-speed A/D converter with excellent SNR and SFDR characteristics. It uses a 250 MHz differential sampling clock, receives differential input signals, outputs 12-bit LVDS format differential digital signals, and provides differential synchronous clock signals. In order to improve the test accuracy, the single-ended input signal needs to be converted into differential mode before being sent to the A/D. The gain adjustment and the partial single-ended to differential conversion circuit are shown in Figure 5. Considering the impedance matching problem, when the single-ended signal is converted to differential mode, a 50 Ω matching resistor needs to be connected in series on the two differential lines as the transmitter of the LVDS signal.

In the design of PCB, the differential line should be specially treated. The actual wiring tolerance of the differential line in the routing interval should be controlled within 5 mil; the distance between the two lines in the differential pair should be as small as possible to make the external interference a common mode feature; the lengths in each differential pair should be matched to reduce signal distortion; the power layer is used as the signal loop of the differential line, because the power plane has the smallest transmission impedance, which can effectively reduce the impact of noise. Figure 6 shows a part of the PCB of this design.

In this design, FPGA is used as the receiving end of LVDS signal. First, it is necessary to convert the LVDS differential data and synchronous clock signal input by A/D into a single signal. Here, the VirtexⅡ-Pro series FPGA of Xilinx is selected. This series of FPGA is embedded with high-speed I/O interface, which can realize ultra-high bandwidth system chip design, support various differential interfaces such as LVDS and LVPECL, and has strong adaptability, providing a perfect solution for high-speed data interface. The reception of LVDS differential signal can be realized by instantiating the IBUFDS_LVDS module, and the internal matching resistor is set in the program to realize the impedance matching of LVDS. The differential clock signal is connected to FPGA from the global clock input pin, and then the clock is converted into a single signal and processed by frequency division, phase shifting, etc. by calling the digital clock management module (DCM) unique to xFPGA, as the clock signal for subsequent processing.

2.3 PXI interface design

PXI is the extension of PCI in the field of instruments (PCI eXtensions for Instrumentation ) . It develops the PCI bus technology defined by the CompactPCI specification into mechanical, electrical and software specifications suitable for testing, measurement and data acquisition applications, thus forming a new virtual instrument architecture. The PXI modular instrument system has high-speed performance and maintains compatibility with PCI, forming a mainstream virtual instrument test platform. In this design, PCI9054 is used to design the PXI interface hardware. PCI9054 is a 32-bit/33 MHz universal PCI bus controller dedicated device produced by PLX, USA. It has powerful functions and a simple user interface, providing a simple method for the development of PCI bus interfaces. [page]

2.4 PXI driver development

The software requirements of PXI include supporting standard operating system frameworks such as Microsoft Windows NT and 95 (WIN32), requiring all instrument modules to have configuration information and support standard industrial development environments (such as NI's LabVIEW, LabWindows/CVI and Microsoft's VC/C++, VB and Borland's C++, etc.), and device drivers that comply with VISA specifications (WIN32 device drivers). This design uses KRF-Tech's Windriver to write device drivers. Windriver has written API function packages for PLX and AMCC's dedicated interface devices, which reduces the difficulty of development. The software flow chart of the driver is shown in Figure 7, and Figure 8 is the interface of the soft panel of this digitizer module. All controls on the digitizer can be completed by setting this virtual software interface.

3 Conclusion

This paper presents the design and implementation method of a high-speed digitizer module based on the PXI bus interface, introduces the circuit structure and connection method of the LVDS interface and LVPECL interface in the high-speed data acquisition system, and applies them in the designed digitizer module. The system can work stably at 250 MHz to achieve high-precision, long-term data acquisition and analysis. The digitizer module has been successfully applied to multiple PXI test systems and is widely used in industrial automation, communications, scientific research, military, aerospace, consumer electronics and other fields.