Analysis of CS485xx Digital Audio DSP Processing Solution

Publisher:LianaiLatest update time:2024-09-10 Source: elecfansKeywords:CS485xx  DSP Reading articles on mobile phones Scan QR code
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The Cirrus CS485xx DSP family provides high-performance post-processing and mixing of digital audio. Dual clock domains provided on the PCM input allow mixing of audio streams with different sampling frequencies. Low-power standby mode extends battery life, making it suitable for applications such as car audio systems that are often turned on but do not necessarily require audio processing.


The CS485xx family includes three devices, namely the CS48520, CS48540 and CS48560, and the difference between the devices is the number of available inputs and outputs. All DSPs support dual input clock control and dual audio processing paths, and are packaged in 48-pin QFP.

Analysis of CS485xx Digital Audio DSP Processing Solution

Figure 1 CS48500 system block diagram

Analysis of CS485xx Digital Audio DSP Processing Solution

Figure 2 Block diagram of the CDB48500-USB evaluation board

CS485xx Series Key Features

Low-cost, high-performance 32-bit DSP

- 300 000 000 MAC/s (Multiply Accumulate per Second)

- Double MAC cycles per clock

- 72-bit accelerator is more accurate in industrial applications

- 24k×32 SRAM, 2k blocks for data or program

- Internal ROM includes various configurable sound enhancement instruction sets

- 8-channel internal DMA

- Internal watchdog DSP lockup prevention

DSP Toolbox w/Personal Keys to Protect Consumer IP

- Configurable serial audio input/output

- Max 32 bits @ 192kHz

- Support 32-bit audio sampling I/O between DSP chips

- TDM input mode (multiple channels on the same line)

- 192kHz SPDIF transmitter

- Multi-channel DSD direct bitstream digital SACD input

Supports two different input Fs sampling rates

- Output can be in master mode or slave mode

- Dual processing path capability

- Input supports dual domain slave clock

- Hardware-assisted time sampling to cope with sampling rate changes

Integrated clock manager/PLL

- Can start from external quartz, external oscillator

Input Fs Audio Detection

Host control and boot via serial interface

Configurable GPIO and external interrupt input

1.8V core and 3.3VI/O can accept up to 5V input

Low Power Mode

- Meets Energy Star requirements in low power mode, with standby power consumption of 268μW

Analysis of CS485xx Digital Audio DSP Processing Solution

Figure 3 CDB48500-USB evaluation board connection diagram

CS485xx Series Target Applications

digital tv

Multimedia peripherals

iPod

Front components

Automotive External Amplifiers

HD-DVD & Blu-ray Disc DVD Receiver

PC Speakers

CDB48500-USB Evaluation Board

Each CDB48500-USB evaluation board includes:

CDB48500 Development Board

Power supply: +9V, 1.67A, 100V~240V, with AC power cord

CDB USB Master Digital I/O Card

USB cable

Three boards are stacked to determine the output of the CS48520, CS48540, and CS48560

CDB48500-USB Evaluation Board Features

PC Control of the CS485XX Using the DSP Composer Graphical User Interface

Serial control of audio devices on CDB48500 via I2C or SPI protocol

Digital audio input via optical or coaxial S/PDIF for PCM (compressed data input is not supported)

Up to 12 channels of analog audio input via two CS42448 audio codecs

Up to 12 channels of analog audio output via two CS42448 audio codecs

Digital audio output for PCm via optical S/PDIF

Headphone output jack

Multi-channel digital audio input via CDB USB MASTER card (not yet supported)

Separate input and output clock domains enable 1FS to 2FS audio processing on the CS485xx

Fast boot for consumer applications from 4Mbits serial SPI flash devices - Host Controlled Master Boot (HCMB)

Microphone input with integrated amplifier for Intelligent Room Calibration (IRC) evaluation (future)

Supports all CS485xx series products in 48-pin LQFP package


Keywords:CS485xx  DSP Reference address:Analysis of CS485xx Digital Audio DSP Processing Solution

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