1. Introduction to control chips
Autonomous driving chips refer to SoC chips that can achieve high-level autonomous driving. As a general-purpose processor, CPU is suitable for processing a moderate number of complex operations.
Control chips mainly refer to MCU (Microcontroller Unit), that is, microcontrollers, also called single-chip microcomputers. They appropriately reduce the main frequency and specifications of the CPU, and integrate multiple functional modules and interfaces such as memory, timer, A/D conversion, clock, I/O port and serial communication on a single chip to realize terminal control functions. It has the advantages of high performance, low power consumption, programmability and high flexibility.
Automotive-grade MCU schematic
※Source: Public information, provided by the compilation unit
Automobiles are a very important application field for MCUs. According to IC Insights data, the proportion of global MCUs used in automotive electronics in 2019 was about 33%. The number of MCUs used in each high-end car is close to 100. From the on-board computer, LCD instrument panel, to the engine and chassis, all large and small components in the car need to be controlled by MCU. In the early days, 8-bit and 16-bit MCUs were mainly used in automobiles, but with the continuous strengthening of automobile electronics and intelligence, the number and quality of MCUs required are also constantly improving. At present, the proportion of 32-bit MCUs in automotive MCUs has reached about 60%, among which ARM's Cortex series cores are the mainstream choice of various automotive MCU manufacturers due to their low cost and excellent power consumption control.
The main parameters of automotive MCU include operating voltage, operating main frequency, Flash and RAM capacity, number of timer modules and channels, number of ADC modules and channels, type and number of serial communication interfaces, number of input and output I/O ports, operating temperature, packaging type and functional safety level, etc.
According to the number of CPU bits, automotive MCUs can be mainly divided into 8-bit, 16-bit and 32-bit. With the upgrading of technology, the cost of 32-bit MCUs has continued to decline, and it has now become the mainstream, gradually replacing the applications and markets previously dominated by 8/16-bit MCUs.
If divided by application field, automotive MCU can be divided into body domain, power domain, chassis domain, cockpit domain and intelligent driving domain. Among them, for the cockpit domain and intelligent driving domain, the MCU needs to have higher computing power and high-speed external communication interfaces, such as CAN FD and Ethernet. The body domain also requires a large number of external communication interfaces, but the computing power requirements for the MCU are relatively low, while the power domain and chassis domain require higher operating temperature and functional safety level.
2. Chassis domain control chip
The chassis domain is related to the driving of the car. It is composed of the transmission system, driving system, steering system and braking system. It consists of five major subsystems, namely steering, braking, shifting, throttle and suspension systems. With the development of intelligent automobiles, the perception and recognition, decision-making planning, and control execution of smart cars are the core systems of the chassis domain. Wire-controlled steering and wire-controlled braking are core components for the execution end of autonomous driving.
(1) Work requirements
The chassis domain ECU adopts a high-performance, upgradeable functional safety platform and supports sensor clusters and multi-axis inertial sensors. Based on this application scenario, the following requirements are put forward for the chassis domain MCU:
High main frequency and high computing power requirements, the main frequency is not less than 200MHz and the computing power is not less than 300DMIPS
The Flash storage space is not less than 2MB, with code Flash and data Flash physical partitions;
· RAM no less than 512KB;
· High functional safety level requirements, can reach ASIL-D level;
Support 12-bit precision ADC;
Support 32-bit high-precision and high-synchronization timer;
Supports multi-channel CAN-FD;
Support no less than 100M Ethernet;
Reliability no less than AEC-Q100 Grade1;
Support online upgrade (OTA);
Support firmware verification function (national secret algorithm);
(2) Performance requirements
Kernel part:
I. Core main frequency: the clock frequency of the core when it is working, which is used to indicate the oscillation speed of the core digital pulse signal. The main frequency cannot directly represent the core's computing speed. The core's computing speed is also related to the core's pipeline, cache, instruction set, etc.
II. Computing power: DMIPS can usually be used for evaluation. DMIPS refers to a unit that measures the relative performance of MCU comprehensive benchmark programs.
Memory parameters:
I. Code memory: memory used to store code;
II. Data storage: a memory used to store data;
III.RAM: Memory used to store temporary data and code.
Communication bus: including vehicle-specific bus and conventional communication bus;
High-precision peripherals;
Operating temperature;
(3) Industrial structure
Since different car manufacturers use different electronic and electrical architectures, the demand for chassis domain components will be different. Different models of the same car manufacturer have different ECU choices for the chassis domain due to different high and low configurations. These distinctions will cause the demand for chassis domain MCUs to be different. For example, the Honda Accord uses 3 chassis domain MCU chips, and the Audi Q7 uses about 11 chassis domain MCU chips. In 2021, the production of Chinese-branded passenger cars will be about 10 million, of which the average demand for chassis domain MCUs per vehicle is 5, and the total market volume will reach about 50 million. The main suppliers of MCUs in the entire chassis domain are Infineon, NXP, Renesas, Microchip, TI and ST. These five international semiconductor manufacturers account for more than 99% of the market share of chassis domain MCUs.
(4) Industry barriers
From the perspective of key technologies, chassis domain components such as EPS, EPB, and ESC are closely related to the driver's life safety, so the functional safety level requirements for chassis domain MCUs are very high, basically ASIL-D level requirements. There is a blank domestic MCU with this functional safety level. In addition to the functional safety level, the application scenarios of chassis domain components have very high requirements for the MCU's main frequency, computing power, memory capacity, peripheral performance, and peripheral accuracy. Chassis domain MCUs have formed very high industry barriers, which need to be challenged and broken by domestic MCU manufacturers.
In terms of the supply chain, since chassis domain components require control chips with high main frequency and high computing power, this places relatively high demands on the process and manufacturing process of wafer production. At present, it seems that at least 55nm or higher processes are required to meet the MCU main frequency requirements of more than 200MHz. In this regard, the domestic automotive MCU production line is not yet complete and has not reached the mass production level. International semiconductor manufacturers basically adopt the IDM model. In terms of wafer foundries, currently only TSMC, UMC and GlobalFoundries have the corresponding capabilities. Domestic chip manufacturers are all Fabless companies, which face challenges and certain risks in wafer manufacturing and capacity assurance.
In core computing scenarios such as autonomous driving, traditional general-purpose CPUs are difficult to adapt to AI computing requirements due to their low computing efficiency. AI chips such as GPUs, FPGAs, and ASICs have excellent performance on the edge and cloud due to their own characteristics and are more widely used. From the perspective of technology trends, GPUs will continue to dominate AI chips in the short term, and ASICs are the ultimate direction in the long term. From the perspective of market trends, global demand for AI chips will maintain a rapid growth momentum. Both cloud and edge chips have great growth potential. It is expected that the market growth rate will be close to 50% in the next five years. Although the foundation of domestic chip technology is relatively weak, with the rapid implementation of AI applications, the rapid increase in demand for AI chips has created opportunities for the growth of technology and capabilities of local chip companies. Autonomous driving has strict requirements on computing power, latency, and reliability. Currently, GPU+FPGA solutions are mostly used. In the future, as algorithms become more stable and data-driven, ASICs are expected to gain market space.
A lot of space is needed on the CPU chip for branch prediction and optimization, and to save various states to reduce the delay when switching tasks. This also makes it more suitable for logic control, serial operations, and general-type data operations. Taking the comparison between GPU and CPU as an example, compared with CPU, GPU uses a large number of computing units and a very long pipeline, with only very simple control logic and no cache. The CPU not only has a lot of space occupied by cache, but also has complex control logic and many optimization circuits. In comparison, computing power is only a small part.
3. Power domain control chip
The power domain controller is an intelligent powertrain management unit. It uses CAN/FLEXRAY to achieve transmission management, battery management, and monitor alternator regulation. It is mainly used for powertrain optimization and control, and also has functions such as electrical intelligent fault diagnosis, intelligent power saving, and bus communication.
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Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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