Intel's mobile processor Tiger Lake shines on Hotchips

In this year's mobile processor battlefield, AMD's latest mobile Ryzen 4000 series, with its more advanced 7nm process technology, more physical/logical cores and integrated more powerful Vega core graphics, leads Intel's 10th-generation Core processors in all aspects of performance.

Intel was not ambiguous in the face of challenges. It continued to improve its existing products and launched the new Tiger Lake mobile CPU. In this year's Hotchips, it finally disclosed the architectural details of Tiger Lake.

In terms of technology, Tiger Lake CPU is manufactured with 10nm+ technology, which is equivalent to an evolved version of the 10-nanometer process. Tiger Lake's new generation 10nm process introduces the revolutionary SuperFin transistor structure for the first time, combining enhanced FinFET crystals and Super MIM (metal-insulator-metal) capacitors to provide enhanced epitaxial source/drain, improved gate process, and additional gate spacing. The performance can be improved by more than 15% compared to the first generation 10nm. From an architectural perspective, Tiger Lake will be stronger than Ice Lake. The core of Tiger Lake is Willow Cove, and the core of Ice Lake CPU is Sunny Cove. In comparison, Willow Cove's cache subsystem is more advanced than Sunny Cove's cache subsystem.

The non-arcing critical IP of the new transistor is optimized to provide more space for high arc critical materials

It is understood that the architecture of the Tiger Lake CPU part is code-named Willow Cove, which is a deep enhancement based on the Sunny Cove architecture integrated in the previous 10nm Ice Lake 10th-generation Core. The frequency, energy efficiency, and redesigned cache system have been greatly improved. Coupled with other improvements, it can provide CPU performance improvements beyond generations. In addition, there is Control Flow Enforcement Technology to enhance security.

The detailed parameters are as follows:

LPDDR5-5400 support, PCIe 4.0 x4

12 MB non-inclusive L3

1.25 MB non-inclusive L2

4x4K display pipes

IPU6 - two different flavors based on the chip config (?!?)

Improved Debug

GNA 2.0 does up to 38 GigaOPs, 1 GOP per watt (and it scales)

Better FIVR

Total Memory Encryption support

The Achilles' heel of the Ice Lake/Sunny Cove generation is that the frequency cannot be increased. Even the special version customized by Apple can only accelerate to 4.1GHz at most, and the public version is even only 3.9GHz. In comparison, the mature 14nm can easily allow the 10 cores to soar to 5.3GHz.

Tiger Lake/Willow Cove has achieved a leap forward. The specific figures have not been announced, but from the official slides, the frequency can be increased by up to 700MHz at the same voltage, and the voltage can be further increased, and the acceleration frequency has great hope of reaching or even exceeding 5GHz. In fact, from the previously exposed samples, 5GHz is a sure thing.

In terms of core graphics, Tiger Lake integrates the newly designed Xe architecture for the first time, more precisely, the Xe LP low-power version, which greatly improves energy efficiency and has up to 96 execution units (EUs), half more than Ice Lake. It also has a large 3.8MB L3 cache and improves memory and architecture efficiency to obtain higher bandwidth. Future Intel discrete graphics cards will be developed based on Xe.

The graphics performance of Tiger Lake with a new architecture will be 3 times stronger than the UHD graphics card integrated in the 8th generation CPU. Playing 1080 (60fps) games with Tiger Lake should not be a problem.

In terms of structure, the Willow Cove architecture uses a dual-ring architecture to connect various modules in series and redesigns the cache system. The L2 cache capacity of each core is increased to 1.25MB, and the L3 cache capacity is also increased by half, while maintaining extremely low hit latency. In addition, the consistency interconnection bandwidth is also increased by 2 times.

The spokesperson mentioned two major advances in Tiger Lake: one is wireless connectivity and the other is AI.

It is said that Tiger Lake integrates Gaussian network accelerator GNA 2.0 in AI, which can be regarded as Intel's version of neural processing unit (NPU), which will increase by 1.5-2 times. Tiger Lake is a low-energy chip, especially suitable for IoT devices. In terms of Wi-Fi, Tiger Lake supports the 6th generation 802.11.ax standard, which not only reduces power consumption and speeds up, but also shortens latency. It is believed that devices equipped with Tiger Lake chips should be able to extend battery life and have faster connection speeds.

This independent IP module can efficiently perform neural inference calculations with very low power consumption and reduce CPU occupancy by 20%, thereby greatly improving AI performance and expanding AI application scenarios, such as high dynamic range neural network noise reduction.

In terms of display, Tiger Lake is committed to providing more display technologies at higher resolution and image quality, such as setting up a separate structural channel between the display engine and the memory to maintain high-quality image transmission, with a bandwidth of up to 64GB/s. At the same time, there is also a new generation of image processor unit IPU6, which is fully hardware integrated, integrates up to 6 sensors, supports up to 4K90Hz video output, 42 million pixel static image output - initially supports up to 4K30Hz, 27 million pixels.

In terms of IO input and output, Tiger Lake integrates support for the new generation of Thunderbolt 4 and USB4, both with a maximum bandwidth of 40Gbps, and the physical interface (Type-C) and transmission protocol are compatible with each other, so you can use it anywhere. Of course, Thunderbolt 4 is more advanced. It also integrates display output on the Type-C interface subsystem, including DP Alternate mode, Thunderbolt DP Tunneling, and supports the DP input interface of independent graphics cards. Most importantly, PCIe 4.0 is also natively supported, allowing the CPU to access memory with high bandwidth and low latency, with a full bandwidth of 8GB/s, and the latency is reduced by about 100ns compared to the connection chip.

In terms of power consumption, the consistent structure and memory subsystem integrate autonomous DVFS (dynamic voltage and frequency scaling), which improves the efficiency of the fully integrated voltage regulator (FIVR). It can realize dynamic scaling of frequency and voltage according to the voltage, taking into account both high energy efficiency and high performance.

So far, Tiger Lake is likely to offer better GPU performance than Ryzen 4000 Mobile chips, but at the expense of multi-threaded CPU performance. Pricing will be a key factor in determining Tiger Lake's success.