Xilinx Kintex-7 FPGA DDR3 Interface Performance Demonstration-EEWORLD

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This demonstration shows the interface capabilities of a Kintex-7 FPGA to a DDR3 memory. The demonstration shows how easy it is to port a high-performance 1600 Mbps DDR3 design to a hardware platform. Examples are now available. These capabilities allow users to quickly start the DDR3 portion of an FPGA design to accelerate overall time to market. The reference design presented here is a standard IP core that is available free of charge through the Memory Interface Generator (MIG) IP core. This reference design has been ported to the Kintex-7 KC705 platform. This demonstration also uses the ChipScope™ Analyzer software to show the functionality of the interface and DDR3 controller. The software can test and verify the interface functionality of the DDR3 interface when running at 1600 Mbps between the FPGA and the DDR3 64-bit SODIMM on the Kintex-7 FPGA Development Kit KC705 board.

Keywords：Xilinx Reference address：Xilinx Kintex-7 FPGA DDR3 Interface Performance Demonstration

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