Briefly describe the principle of DDS and its implementation based on FPGA

DDS, like DSP (digital signal processing), is a key digital technology. DDS is the abbreviation of Direct Digital Synthesizer. Compared with traditional frequency synthesizers, DDS has the advantages of low cost, low power consumption, high resolution and fast conversion time. It is widely used in the fields of telecommunications and electronic instruments and is a key technology for achieving full digitalization of equipment. In test applications in various industries, signal sources play an extremely important role. However, there are many different types of signal sources, and different types of signal sources have different functions and characteristics, and are suitable for many different applications. At present, the most common types of signal sources include arbitrary waveform generators , function generators , RF signal sources, and basic analog output modules . The use of DDS technology in signal sources has gradually become a mainstream practice in the current test and measurement industry. Using it to design a DDS circuit that meets your needs is a good solution.

1 Basic Principles of DDS

The main idea of ​​DDS is to synthesize the required waveform based on the concept of phase. Its structure consists of five parts: phase accumulator, waveform memory , digital-to-analog converter , low-pass filter and reference clock. Its basic principle block diagram is shown in Figure 1.

In summary, when the sampling frequency is constant, the frequency of the obtained discrete sequence can be controlled by controlling the frequency control word K, and the analog signal of this frequency can be uniquely restored after holding and filtering.

2. Solution of DDS based on FPGA technology

FPGA (Field-Programmable Gate Array ), which is a field-programmable gate array , is a product that is further developed on the basis of programmable devices such as PAL, GAL, CPLD, etc. It emerged as a semi-custom circuit in the field of application-specific integrated circuits ( ASIC ), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of gate circuits of the original programmable devices. FPGAs are generally slower than ASICs (application-specific integrated circuits ), cannot complete complex designs, and consume more power. However, they also have many advantages such as fast production, can be modified to correct errors in the program, and cheaper costs. Manufacturers may also provide cheap but poorly editable FPGAs. Because these chips have relatively poor editability, the development of these designs is completed on ordinary FPGAs, and then the design is transferred to a chip similar to ASIC. Another method is to use CPLD (complex programmable logic device ).

The basic working process of implementing DDS with FPGA is: the generated data is stored in the fixed data RAM through the VXI interface circuit, and then the phase accumulator designed by FPGA is used to calculate and select the data storage address in the RAM, and finally the frequency control word given by the data is output, and the arbitrary waveform output is realized through DAC conversion. The schematic diagram is shown in Figure 2. The dotted line part can be implemented by FPGA.

The reference clock in Figure 2 is generated by a highly stable crystal oscillator , which is mainly used to control the synchronous operation of each device in the DDS. The dotted part is equivalent to the phase accumulator, which is composed of an N-bit adder and an N-bit phase register. It is actually a counter . For each clock pulse, the adder adds the phase increment data with the accumulated phase data output by the phase register, and sends the result of the addition to the data input of the phase register. The phase register feeds back the new phase data generated by the adder after the previous clock to the input of the adder, so that the adder continues to add with the frequency control word under the action of the next clock. From this point of view, the phase accumulator accumulates the frequency control word once for each clock pulse input, and the data output by the phase accumulator is the phase of the synthesized signal. The overflow frequency of the phase accumulator is the signal frequency output by the DDS.

3 Conclusion

Using FPGA to design DDS circuits gives full play to the advantages of FPGA in system programmability. The relevant parameters can be flexibly changed through software, which brings a lot of convenience to the design. Using FPGA to design DDS circuits is more flexible than using dedicated DDS chips. As long as the ROM data in the FPGA is changed, the DDS can generate the required waveform data, and the function of the FPGA depends entirely on the design needs, so it has considerable flexibility. Embedding the DDS design into the system composed of FPGA chips will not increase the system cost much. Therefore, using FPGA to design DDS systems has a high cost-effectiveness.