The control circuit of the LED large-screen display system currently used is mostly composed of a single or multiple CPUs and complex peripheral circuits. This circuit design and single-chip microcomputer programming are relatively complex, the debugging of the entire circuit is relatively troublesome, and the reliability and real-time performance are difficult to guarantee. In view of this situation, a large-screen design scheme that uses SD card to store display files and is completed by TMS320LF2407A and EPM240 is proposed, which completely separates the transformation and processing of animations from the display control of the screen. Each module has clear tasks and complete functions, giving full play to the respective advantages of DSP and CPLD to achieve high-performance flicker-free display.
1 Overall design
The system structure is shown in Figure 1. The core processor uses TMS320LF2407A, and the network interface chip RTL8019AS, SD card and dual-port RAM chip are expanded externally. In this system, DSP mainly plays its logical operation processing capability; the network communication file receiving function, graphic text conversion function and file reading and saving function are all completed by TMS320LF2407A; while the CPLD chip EPM240 has a relatively simple function, which is only responsible for obtaining the data to be displayed from the dual-port RAM, batch reading and sending it to the LED dot matrix array driven by multiple 74LS595. In other words, EPM240 is responsible for real-time dynamic refresh of the screen display, ensuring the refresh speed without flickering (that is, the refresh frequency must reach more than 100 Hz).
The system is mainly divided into three functional modules:
(1) Ethernet data transmission part. The PC sends the data to be displayed (which may be screenshot data or text files, etc.) to this system in the form of UDP datagrams via Ethernet. The RTL8019AS will automatically discard data packets that are not sent to the local IP address. The main program queries the RTL8019AS to receive new data packets and read them into the SD card file buffer. When the buffer is full, it is written to the SD card FAT32 file system in the form of a file.
(2) DSP animation transformation algorithm implementation part. TMS320LF2407A has 32 KB external RAM space, and the dual-port RAM shown in Figure 1 is expanded to this space. First, the DSP divides this 32 KB space into two areas (16 KB each), which are used as the logic operation area and the display memory area (both in the dual-port RAM). The DSP reads the file data to be displayed in the SD card and sends it to the logic operation area. It makes corresponding transformations according to the animation requirements of the screen. The transformed dot matrix directly fills the display memory area so that the CPLD can read the display data from this area.
(3) CPLD display graphics refresh. Taking advantage of the fast speed of CPLD, the data in the display memory area is quickly read and sent to the 74LS595 driver extended LED array. Due to the single function, the display has a very high refresh speed and no flickering.
2 Main tasks of EPM240
EPM240 needs to read data from the display memory area of the dual-port RAM, so one port of the dual-port RAM must be connected to EPM240 in the hardware circuit. When describing the circuit in VHDL language, a state machine is used to realize EPM240's control of the dual-port RAM and data reading. Since the two ports of the dual-port RAM may operate on the same unit at the same time, the BUSY pin of the dual-port RAM must be connected to the DSP and EPM240 respectively. When one side is operating, the other side must wait for the operation to end, otherwise data errors may occur. When operating the display memory area, the DSP uses the reverse address direction (address from large to small), while the EPM240 uses the positive address direction. The advantage of this is that when modifying an image, it is possible to avoid the phenomenon of operating the same unit at the same time.
In addition to completing the work of interfacing with the dual-port RAM, EPM240 must also continuously send the bytes read in to 74LS595 to refresh the hardware display. This can be done by using VHDL to describe the SPI bus interface protocol. In short, CPLD plays the role of data transfer in this system (display memory area -> EPM240 -> LED display).
3 DSP realizes image animation transformation
Common animation processing includes left and right translation, up and down translation, continuous screen pulling, fan-in and fan-out, etc. Based on the double buffer design pattern proposed above, the implementation of animation becomes clear and easy. The animation change principle is shown in Figure 2.
In Figure 2, it is assumed that the actual screen width used by the user is Width point and the height is Height point. The basic idea of the algorithm is to assume that there is a window that is the same size as the actual screen and can be moved in the logic operation area according to certain rules as needed. That is, only the part that falls within the window can be displayed on the actual screen (sent to the display memory area).
For example, to achieve the left-right translation of an image, before implementing the algorithm, the original data of the display file needs to be loaded into the logical operation area, and then the offset coordinates (OffX, OffY) of the window need to be reset to (0, 0). After each time interval set by the user, the left-right offset OffX is adjusted to accumulate SpeedDot (animation speed, set by the user), and then the data that falls into the window is mapped to the display memory area, and EPM240 is responsible for refreshing the display. When OffX accumulates to reach Width, the animation ends. At this time, the original data of the next image file can be loaded into the logical operation area for similar animation operations. For another example, to achieve the image gradually flying into the screen from the lower right corner, (OffX, OffY) can be initially set to (-Width, -Height). Obviously, no data falls into the window at this time. After that, the following mapping operation can be performed after each time interval:
OffX+=SpeedDot;
OffY+=SpeedDot*((float)Height/Width);
4. Implementation of Network Transmission
The connection between RTL8019AS and TMS320LF2407A is shown in Figure 3. Using Ethernet for data transmission can improve the communication quality, with the characteristics of fast communication speed and large amount of data transmission, and simple access. Just connect the RJ45 connector to the hub to achieve the physical connection of the network.
Ethernet mainly has two communication protocols: TCP and UDP. TCP provides reliable transmission services to ensure that data is not lost, but its implementation is relatively complex, the task is relatively heavy, and the system RAM consumption is relatively large; UDP provides unreliable transmission services to transmit data to the destination as much as possible. Reliable data transmission can only be verified and initiated by the upper layer (usually the application layer), with fast transmission, small amount of calculation, and simple and easy algorithm.
For this system, tasks such as large screen dot matrix transformation and file system operation are already quite arduous, and Ethernet transmission is generally only performed when setting display images and animations, so the possibility of packet loss is not great, so the UDP protocol is used. When sending, you only need to send the data to be transmitted layer by layer to the lower layer, and add the header of this layer (some also add a tail) in front of each layer. The header contains relevant transmission information, and finally sends the final encapsulated data frame to the network through the physical layer (RTL8019AS driver layer). Receiving is just the reverse process of sending. You only need to peel off the header layer by layer (check whether it is correct when peeling, otherwise discard it), and finally get the encapsulated data. After receiving the correct data, the DSP saves it to the SD card in the form of a file. The application layer flow chart of this module is shown in Figure 4.
5. Composition of large screen array
The display panel is composed of 32×16 dot matrix as the smallest unit. JP1 is the input signal. When multiple units are connected to form a large screen, just connect the JP2 port of the previous unit to the JP1 port of the next unit. The JP1 port of the first unit board is connected to the control board, and the CPLD scans and displays. Using the 1/16 scanning method, the row signal is decoded by 74HC154 and output, and the driving ability is enhanced by APM4953 (two P-channel MOS tubes inside); the column signal is composed of 74HC595 cascaded to provide the input current of the column line. Due to the large current consumption during cascade, a power module is set for each unit board. Due to space limitations, these figures are not given. When controlling, the CPLD first sends the data of the current row serially through the column data port, then selects the current row for display, and performs the same operation on the next row after a pause. The interface of this circuit is very simple, and it is also very convenient to expand the large screen.
This solution uses Ethernet communication, which greatly improves the data transmission speed and reliability; fully utilizes the computing advantages of DSP to perform real-time transformation processing of animation, and completely separates the transformation from display control; the use of CPLD can greatly improve the control speed of hardware, quickly refresh the screen, be stable and reliable, and have a high scanning frequency.
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Recommended ReadingLatest update time:2024-11-16 19:58
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