Optimizing Automotive EMI Using DC/DC Buck Regulators

This article is translated from EDN, author Zachary Imm

As cars are equipped with more sensors and features, the electronic content in vehicles continues to increase, and power levels continue to rise. Engineers who have relied on low dropout linear regulators (LDOs) in the past may now need to use a buck topology to meet the high efficiency requirements of their systems.

Bucks can deliver more power than typical LDOs at higher efficiency, but have one significant drawback—their switching characteristics generate electromagnetic interference (EMI), which can be a serious problem for automotive applications. Fortunately, engineers can use many tricks and tools to reduce EMI, including optimizing board layout, taking advantage of IC features, and adding circuits.

DC/DC converters generate EMI due to input ripple, electromagnetic coupling from nearby circuits, and electromagnetic radiation. EMI can interfere with AM/FM radio receivers and other sensitive equipment, such as head units or advanced driver assistance system (ADAS) sensors. Severe EMI can create static or other types of noise in radio and head unit audio, interfere with ADAS sensors, and degrade the performance of other systems.

To prevent this severe interference, engineers need to design systems that comply with official standards, such as CISPR 25 Class 5. Since poor layout can cause a device to fail the EMI limits set by standards bodies, good layout optimization practices must be followed during board layout. The most important practices for buck converters are:

The surface area of ​​the node is reduced by rapidly changing voltage (high dv/dt).

Reduce the area of ​​the current loop with fast changing current (high di/dt).

These two basic rules will dictate where engineers place certain components to minimize EMI.

Unfortunately, even the most optimized PCB layout cannot prevent all EMI-related problems. In addition, it is often not possible to optimize the layout for EMI as much as possible due to the size, shape, or timing of the board. For example, a very compact layout may require you to place the power inductor on the bottom of the board or place the input capacitor slightly further away from the IC.

These and other layout limitations can cause EMI that degrades system performance. Even with experience and exceptional care, the board may need further optimization. These additional board revisions cost time and money. So, what else can you do besides optimizing your layout to minimize EMI for your application?

Bypassing board layout limitations

If the layout cannot be optimized for optimal EMI, some DC/DC converters offer many packaging and feature improvements at the device level to help minimize EMI and make it easier to meet CISPR 25 Class 5 limits. These features make board design independent of layout. In other words, they can help make up for shortcomings in layout.

For example, spread spectrum is a function that spreads harmonic energy to reduce peak and average EMI measurements. By modulating the spike clock so that it changes from a narrowband clock to a spectrum with sidebands, the spike energy is dispersed to multiple frequency bands in the spread spectrum area, thereby achieving the effect of reducing spike energy and suppressing EMI. It expands the spectrum density by jittering the switching frequency. For example, spreading the spectrum within the range of ±2% will see that the harmonic energy is completely mixed or overlapped on the 25th and higher harmonics, rather than a fixed frequency, which will keep the harmonic spikes on the fundamental frequency. The energy is evenly distributed in higher frequencies, resulting in a lower measurement envelope, requiring less filtering and less layout optimization, saving time and money. 

Slew rate control is another feature that helps improve EMI performance, the main source of EMI is the switching loop. The switching loop is caused by the fast turn-on of the high-side FET, which quickly pulls current from the input capacitor, the resonance of the input parasitic loop inductance and the low-side FET parasitic capacitance, and the resulting ringing noise of hundreds of megahertz. By slowing down the rise time, the current draw is slowed, thus reducing ringing and EMI. The rise time can be slowed down by adding a resistor in series with the startup capacitor (on the order of a few ohms), and some devices have a dedicated startup resistor pin. There is a trade-off here: slowing down the frequency of the FET minimizes EMI, but it also increases switching losses, which reduces efficiency.

In addition, there are packaging technologies that help suppress EMI. One example is TI’s HotRod package, which eliminates internal bond wires, as shown in Figure 1. Discontinuous currents can cause hundreds of megahertz ringing on the switch node, which couples and radiates, causing EMI. Removing bond wires from the high di/dt loop path of the input capacitor’s discontinuous current reduces loop inductance. This reduces ringing and reduces EMI. The HotRod family includes devices such as the LM61460-Q1 and LM53635-Q1.     

Figure 1 The difference between standard QFN and TI's HotRod QFN. Source: Texas Instruments  

Other package-level features include optimized pinouts. Devices can improve EMI performance by arranging pin locations so that critical paths, such as input capacitors, are kept as small as possible. Devices typically place the VIN and GND (or PGND) pins next to each other to provide an optimal location for the capacitor's connection.

Going a step further, use a symmetrical pinout. Placing the VIN/PGND symmetrically on either side of the package allows the input loop magnetic field to be self-contained, further reducing EMI. Many DC/DC step-down converters, such as the LMR33630, LMR36015, LM61460, and LMQ61460-Q1, have a symmetrical VIN/PGND pin pair (Figure 2b).     

Integrated input capacitor

Next-generation products in EMI-optimized packages use integrated capacitors to further reduce input parasitic inductance. The LMQ61460-Q1 contains two integrated input bypass capacitors on each side, one for each VIN/PGND pair. These capacitors are the dark rectangles that span the upper and lower right pin pairs (VIN and PGND) shown in Figure 2a. Figure 2b shows the pinout for this device for reference. 

Minimizing high-frequency EMI is particularly important because the higher input voltages and higher output currents common in automotive applications exacerbate problems in this area.

Figure 2 X-ray showing the LMQ61460-Q1 step-down low-noise converter with integrated capacitors (a) compared to the pin reference (b). Source: Texas Instruments 

It’s true that EMI presents challenges in automotive applications, but design engineers are not without options if they encounter board layout constraints. From strategic device pinouts to integrated features such as low-inductance packaging, slew-rate control, spread spectrum, and integrated capacitors, there are many ways to address this challenge.

These features allow engineers to relax stringent optimization of EMI layout in exchange for a more comprehensive layout design, leaving more room for optimizing performance for better thermal performance and/or smaller solution size. These features improve your design to confidently meet the EMI limits set by standards bodies.