Study on the Failure Mechanism of IC Smart Card

After thinning, the silicon wafer is sent to the dicing machine for dicing. The cross section of the dicing groove is often rough, usually with a small amount of microcracks and pits; in some places, the dicing is not cut to the bottom. When taking the wafer, the chip must be "forced" to separate by the force of the ejector pin, and the fracture is irregular. Figure 4 is an overlay of multiple samples. Experiments show that damage to the chip edge caused by dicing will also seriously affect the chip's fragmentation strength. For example, a chip with microcracks or grooves on the fracture will break under the instantaneous impact of the subsequent wire bonding process or the stress generated by the mismatch of the coefficient of thermal expansion (CTE) during the heat treatment after encapsulation, which causes the microcracks to expand.

In order to reduce the damage to the chip caused by the dicing process, new dicing technologies have been introduced: dicing before thinning (DBG) and dicing by thinning (DBT)5, that is, before thinning the back of the silicon wafer, a cut is made on the front by grinding or etching to achieve automatic separation of the chip after thinning. These two methods can effectively avoid/reduce the warping of the silicon wafer caused by thinning and the damage to the chip edge caused by dicing. In addition, the use of laser dicing technology with non-mechanical contact processing can also avoid micro cracks, fragments and other phenomena caused by mechanical dicing, greatly improving the yield rate.
1.3 Module process
The module process includes processes such as chip loading and encapsulation. During the chip loading process, the chip loading machine ejector pin lifts the chip from the chip film, and the vacuum suction head sucks the chip and bonds it to the lead frame of the chip card. If the process parameters of the chip mounter are not adjusted properly, the back of the chip will be damaged, seriously affecting the chip strength. For example, if the ejector force is uneven or too large, the ejector will pierce the blue film and directly act on the chip, leaving a circular damage pit on the back of the chip. Or the ejector has a certain amount of equal sliding process on the back of the chip, leaving a large scratch. This phenomenon accounts for a considerable proportion of broken chips.

Fig The action of the ejector pin can be equivalent to the pressure loading process of the Vicker indenter 4, which will cause local damage to the chip surface. Now the process of the ejector pin touching the back of the chip (not considering the slip of the ejector pin for the time being) is simplified to the ideal case of vertical loading on the spherically symmetrical plane. The change of the contact circle radius a between the two with the vertical load P is a=34PR(1-v2)/E+(1-v′2)/E′1/3=αP1/3, where R is the radius of the ejector pin end, E, v and E′, v′ are the Young's modulus and Poisson's ratio of the chip and the ejector pin end respectively. At the edge of the contact circle, the tensile stress component of the chip reaches the maximum value σm=12(1-2v)P0, where P0=P/πα2 is the vertical stress on the end, and σm is the stress acting in the radial direction and equal to the material surface. Since the tip radius of the ejector pin is small, v=0.28 for silicon material is taken. Under the action of 1N ejection force, the corresponding relationship between the maximum value of the chip tension component and the contact radius is shown in Figure 5. It can be seen that in the initial case, the contact radius is very small, and the initial value of the chip tension component can reach the GPa level. Compared with the previous calculation results, it can be seen that the ejection pin process is a major cause of chip fragmentation.

In addition, accompanied by the indentation effect, the chip often breaks into pieces, that is, some materials around the indentation are in the form of debris. When the ejection pin acts, transverse cracks will be generated in the deformation zone under the indentation surface. After the indentation effect disappears, the transverse cracks will proliferate until the sample surface, resulting in the generation of fragments. In general, the greater the pressure, the more serious the fragmentation phenomenon.

When the ejection pin acts on the back of the chip during the sliding process, the end of the ejection pin is subjected to the friction resistance proportional to the vertical load, which increases the tensile stress of the contact circle. At the same time, when the ejection pin slides over the chip, it will leave strip-shaped scratches on its back, which may produce fine debris and wedge into the silicon substrate material to form microcracks, greatly affecting the strength of the chip.

OM observation of the back of the unsealed IC card chip revealed that most of the broken chips had pin scratches at or near the cracks, most of which were straight lines with hooks, and the cracks were bent to varying degrees at the scratches. The scratches were large, generally tens of μm long, greater than 10 μm wide, and had a certain depth of about several μm (Figure 6 is a schematic diagram of the statistical data of the scratch shapes and sizes of 20 samples).
Under a specific contact radius, the tensile stress outside the contact circle on the chip surface and the radial distance from the contact center satisfy σr=σm(a/r)2, and σr decreases as the radial distance r from the contact center increases. Therefore, within a certain range from the pin point of action, there is still a tensile stress surface layer on the chip surface, which provides very favorable conditions for crack generation and expansion.

Figure 6 Schematic diagram of ejector scratches

In the IC card molding process, due to the manufacturing process factors, there are certain differences between the module thickness and the card base groove geometry, which cannot be completely matched, which will cause a greater multiple stress. In addition, the thermal expansion and contraction of different materials or external force distortion during use can also easily cause chip breakage.

Figure 7 Failure mechanism in the bonding wire process

2 Bonding-related failures
In the IC card assembly process, failures caused by bonding are also one of the important factors affecting the quality and reliability of IC cards. Bonding failures are mainly manifested as discontinuities in the electrical characteristics of IC cards, such as open circuits accompanied by short circuits, leakage, etc., or "input high" or "input low" failures. Figure 7 shows many failure mechanisms related to bonding6.

Figure 8 Bonding-related failures

Water vapor erosion can cause electrolytic effects, which greatly accelerate metal electromigration. Contamination of the pad substrate with impurities such as C will lead to the generation of voids, causing pad bulges. Figure 8(c) shows a failed sample with discontinuous electrical characteristics. SEM and EDX (Figure 9) analysis proves that there is a bursting phenomenon in the connection part and chlorine exists in the pad.
3 Injection molding-related failures
Like other plastic-encapsulated IC products, punching wires and voids in encapsulation materials during injection molding can also cause IC card failure problems6. Epoxy molding materials are in a molten state during injection molding and are viscous moving fluids. Therefore, they have a certain impact force. The impact force acts on the gold wire, causing the gold wire to deviate. In extreme cases, the gold wire is broken, which is the so-called punching wire.

Assuming that the molten plastic encapsulation material is an ideal fluid and the thickness of the plastic encapsulation body is not considered, the impact of the plastic encapsulation material flow on the gold wire can be expressed as F=Kfηυsinθ, where F is the impact per unit area, Kf is a constant, η is the viscosity of the molten plastic encapsulation material, υ is the flow velocity, and θ is the angle between the flow direction and the gold wire. From the formula, it can be seen that the greater the viscosity of the plastic encapsulation material, the faster the flow velocity, and the larger the angle θ, the greater the impact force generated, and the more serious the wire punching, which will cause short circuits or lead wire connection detachment, resulting in IC card failure.
In addition, the bubbles, small holes and pits (porous surface) left in the injection molding process will diffuse and increase after subsequent processes, which is easy to cause moisture and other harmful impurities to invade, accelerate the formation of IMC, and cause pad corrosion.
4 Failure caused by electrostatic discharge
Electrostatic discharge (ESD) is the transmission of static charge between two objects with different electrostatic potentials caused by direct contact or electrostatic field induction, which often causes many failures such as current melting, charge injection, oxide layer damage and film burning in chip circuits.

An effective method to protect against ESD is to design a specific protection circuit. Figure 10 is an IC card chip ESD protection circuit 7 based on CMOS technology. The structure includes two parts: the main protection circuit and the clamping circuit. When ESD occurs, the clamping circuit is first turned on to clamp the voltage on the input gate to a voltage lower than the gate breakdown voltage. The series resistor in the middle plays a current limiting role, and more importantly, the voltage on the PAD can trigger the opening of the main protection circuit, so that the ESD energy is released through the main protection circuit.

In addition, the occurrence of ESD can be effectively reduced by improving the production process and controlling the use environment. Traditional IC cards use wire bonding strip technology, and chip fragmentation is its main failure mechanism. By improving the process technology of grinding and dicing, improving the process quality of assembly (especially the ejector process during chip installation), bonding, module inlay, etc., the chip fragmentation rate can be greatly reduced, and the yield and reliability of IC cards can be improved.

In addition, failures related to wire bonding and injection molding, such as cold soldering, desoldering, loose or tight wires, punching, or IMC formed due to the intrusion of external moisture and electrical factors, will reduce the reliability of IC cards and cause IC card failure. The occurrence of such failures can be reduced by improving the corresponding process technology. ESD is also one of the important mechanisms of IC card failure. In severe cases, it will cause Al wire/polysilicon resistor burnout, transistor gate oxide layer damage or junction damage. For this, the IC card chip's ability to resist ESD can be improved by designing a special ESD protection circuit to improve the reliability of the IC card.