Realization of high-definition television images for CRT televisions based on PLM1000

PLM1000 appeared in this market context at the right time, providing a high-definition signal interface for ordinary CRT TV sets, so that the TV sets can watch high-definition programs without upgrading. This method of adding functions at a low cost is very consistent with national conditions and meets the needs of the majority of low-end users.

Main features of PLM1000 chip

The PLM1000 series high-definition television image processing chip is an analog/digital hybrid processing chip designed for ordinary CRT televisions using 0.18 micron CMOS technology. It uses 10-bit signal quantization, original input signal format automatic detection and high-quality image processing solutions.

The PLM1000 chip digitizes the input analog TV signal, performs digital signal processing, and finally restores the digital signal to an analog TV signal and outputs it to the analog TV. It supports most high-definition video signals, such as 480P, 576P, 720P, 1080i, 1080P and VGA signals, and supports 4:3, 16:9 and configurable scaling functions; without external memory, all operations are completed on the chip, saving costs; supports brightness, chroma, saturation, color space conversion and RGB conversion functions.

The main features of the chip are as follows:

* 1080P/1080i/720P/480P/576P/480i/576i component input, 480i/576i component output;

* VGA input;

* Analog input and analog output;

* When the input signal frequency is 50Hz, the output signal is 576i; when the input signal frequency is 60Hz, the output signal is 480i;

* When the input signal is 576i or 480i, the input signal is output directly;

* Input signal is compatible with Macrovision;

* The analog-to-digital converter and digital-to-analog converter used at the input and output are both 10-bit converters, which provide a 12dB higher signal-to-noise ratio than traditional 8-bit converters;

* Image enhancement function;

* Image demonstration function;

* No external storage, saving system cost;

* Provides external universal two-wire serial bus control interface, simple software;

* Output is equivalent to the image quality of analog CRT interlaced scan TV when DVD signal is input;

* SDIP64 or LQFP64 package, can be directly mounted on the TV motherboard;

* 3.3V/1.8V power supply.

Application system design based on PLM1000

Figure 1 is a block diagram of the application system based on the PLM1000 chip.

The high-definition video images output from players such as EVD/DVD are sent to the video input terminal of PLM1000. After being processed by PLM1000, the standard-definition component images 480i or 576i are output to the component input terminal of ordinary CRT TVs. The subsequent processing is exactly the same as that of ordinary CRT TVs.

The PLM1000 is mainly composed of a video MUX module, a synchronization separator, a PLL and clamp module, a 3-channel 10-bit high-speed ADC, a Signal Processing module, a 3-channel 10-bit high-speed DAC and a universal serial bus interface module. The working principles of these modules will be introduced below.

(1) Video MUX module

PLM1000 supports two-way video input at the same time: Y/Pb/Pr or Y/Cb/Cr and R/G/B. One video is selected by the video MUX module and input to the ADC. The brightness signal Y is simultaneously input to the sync separator module.

(2) Synchronous separator, PLL and clamp module

The input brightness signal Y is separated by the synchronization separator module into the composite synchronization, horizontal synchronization and vertical synchronization signals required by the subsequent processing module, and the format of the input signal is detected according to the different synchronization information of the input signal in different formats based on the separated signals. The detected format will be transmitted to the register control module, which will configure the corresponding register value to the processing module according to the detected mode selection.

The internal analog phase-locked loop PLL can generate a pixel clock based on the line synchronization frequency, and provide different clock signals according to different signals. In order to retain more image details and keep most of the detail information after the image is processed, an oversampling clock is used to sample the ADC output. Taking 480P as an example, the standard defines a sampling rate of 27MHz and a line effective point of 858 points. According to oversampling, we use a 75.6MHz sampling clock and the line sampling points reach 2400 points, which greatly increases the image detail information.

The transmission of video signals generally adopts AC coupling. In order to restore the DC component in the video signal and eliminate low-frequency interference such as superimposed interference in the video signal, the input signal must be clamped. The clamping circuit receives the precise clamping information input by the Signal Processing module and clamps the input signal to a fixed DC level.

(3) 3-channel 10-bit high-speed ADC

3-way high-speed ADC converts the input high-definition analog video signal into a digital signal. The 10-bit quantization used only in professional-grade video processors ensures the sampling details and accuracy. Compared with the traditional 8-bit ADC, the signal-to-noise ratio is improved by 12dB. In the subsequent signal processing and the final digital-to-analog conversion, 10-bit processing is used.

(4) Signal Processing Module

After ADC quantization, the 10-bit data of each of the three channels enter the Signal Processing module. The core of this module is a high-performance video scaling module: it generates standard-definition video signals according to different scaling ratios from high-definition video signals. It is divided into two parts: the horizontal scaling unit and the vertical scaling unit. A single-port RAM connects the horizontal and vertical scaling units. Compared with the dual-port RAM, although some control logic is added, the single-port RAM is much smaller than the dual-port RAM, so the chip area is reduced.

Traditional TVs require users to manually adjust image parameters according to their preferences, but if the program content changes, such as when playing a program with particularly poor contrast, users need to adjust it again. PLM1000 includes an automatic image enhancement function, which automatically modifies the low-frequency signal of the image according to the video image content and enhances the high-frequency signal of the image, so as to automatically adjust the image parameters and enhance the image visual effect.

This module simultaneously completes functions such as color space conversion, YUV to RGB, and brightness, chroma, and saturation adjustment.

(5) 3-channel 10-bit high-speed DAC

The high-speed DAC module converts the processed digital signal into an analog signal and inputs it into the analog TV. In order to facilitate the manufacturer to do subsequent analog filtering and eliminate the refraction effect in the frequency domain, the DAC clock of PLM1000 is twice the defined output clock.

(6) Universal Serial Bus interface.

The interface between the conversion chip and the outside is a universal two-wire serial bus protocol, through which the register values ​​that need to be changed in PLM1000 can be configured.

The PLM1000 software process is shown in Figure 2:

After power-on, the TV's CPU performs power-on initialization on the PLM1000 chip and performs necessary register configuration. At the same time, to avoid the TV displaying uncertain information during power-on initialization, the PLM1000 turns off the video output at this time. To save power, the PLM1000 supports a standby power saving mode (Power Down). In this mode, the PLM1000 chip and its peripheral circuits consume less than 2mA of current. After power-on initialization, the CPU reads the automatic format detection results inside the PLM1000 chip and determines the current input signal format according to the pre-set rules. If the detection results for N consecutive times are different from the current signal format, the current detection results are set as the new chip format, the CPU turns off the PLM1000 chip video output, and turns on the video output after configuring the chip with corresponding working parameters; if they are different, the original format is maintained, that is, the PLM1000 works in the original format.

PLM1000 Application Notes

As a highly integrated high-definition TV image processing chip, PLM1000 only needs a small number of external circuit components and a 3.3V/1.8V power supply to work. It uses a universal serial bus and can be directly connected to the TV's CPU. TV manufacturers only need to add a few programs to the existing programs to complete the configuration of the PLM1000 chip.

PLM1000 is available in two packages: SDIP64 and LQFP64.

SDIP64 packaged chips can be directly installed on the motherboard of the TV, so TV manufacturers do not have to change the original single-layer circuit board production line, but only need to increase a small amount of component costs.

For 21-inch CRT TVs with tight motherboard dimensions, especially those with ultra-short tubes, LQFP64 (specification: 12mm x 12mm) packaging and plug-in board form are ideal choices. In this way, you only need to design an interface including component video input/output, power supply and serial bus on the original TV board, and produce a plug-in board with PLM1000 LQFP64 package chip installed (some manufacturers have made the size of this plug-in board to 45mm x 65mm) without changing the existing hardware design.

In short, as a high-definition TV image processing chip with completely independent intellectual property rights, PLM1000 makes high-definition images accessible to ordinary people; at the same time, this low-cost high-definition TV image processing solution also extends the industrial cycle of CRT TVs and drives the optimal allocation of resources across the industry.