Application of AD73360 in Power Load Control Terminal

AD73360 is a programmable three-phase electrical quantity test IC device suitable for industrial electric meters and multi-channel input systems. This paper introduces the design and application method of the multi-channel data acquisition system composed of ADSP-BF531 and AD73360 in the power load control terminal.

Keywords: data acquisition; power load; AD73360; ADSP-BF53l

O Introduction

The power load control terminal is a monitoring device installed at the user end. It is responsible for important tasks such as data collection, user control, and information exchange of the power load management system. It is the foundation of the power load management system. It can not only accept remote control commands from the load management center and realize local power and power control according to the power purchase amount or planned power consumption indicators sent by the center, but also return the user's power consumption to the center.

In the power load control terminal, the data acquisition accuracy directly affects the working performance of the system. In the measurement of periodic electrical parameters, synchronous sampling is the key to accurately measure real-time signals. In addition to detecting the voltage and current values ​​of each phase, it also detects the phases between each other, so it requires simultaneous sampling of several signals. In the development of power load control terminal products, this paper selects the digital signal processor ADSP-BF531 as the technical core of the system, and selects the 16-bit A/D converter AD73360 as the core device of the forward channel of the system. Practice shows that AD73360 is suitable as an analog front-end device for power parameter measurement, and has good accuracy and stability in the measurement of power parameters.

1 AD73360 Introduction

AD73360 is a programmable universal 6-channel 16-bit precision serial analog input front-end processor launched by AD1. It is a three-phase electrical quantity test IC device used in industrial electric meters or multi-channel input systems. Each of its channels consists of a signal conditioner, PGA (programmable gain amplifier), analog ∑-△ modulator, sampler and serial port. Because it has an internal PGA and an independent analog front end, it can directly condition and collect tiny sensor signals; ∑-△ ADC generally does not require high-precision analog circuits . However, ordinary signals need to be converted into differential signals before they can be connected for collection. AD73360 has a signal conditioning module designed at the front end, which allows the user's input signal to be single-ended or differential. Therefore, the number and complexity of peripheral circuits can be effectively reduced.

AD73360 is particularly suitable for industrial control applications that require simultaneous sampling. It is suitable not only for large signal applications, but also for small signal applications. AD73360 has six analog input channels that can be sampled simultaneously. These six channels can be sampled simultaneously without CPU intervention. This can effectively reduce the phase error caused by different sampling times. The sampling rate of each channel can be conveniently set at 8 kHz, 16 kHz, 32 kHz and 64kHz using control words. Therefore, it is particularly suitable for three-phase power operation parameter measurement and control applications (three phase voltages and three phase currents are sampled simultaneously) systems.

In addition, compared with the parallel interface , AD73360 uses a six-wire industrial standard synchronous serial interface to connect to the CPU, so its hardware connection lines can be greatly reduced, which can not only reduce the area of ​​​​the printed circuit board, but also reduce electromagnetic interference, thereby improving the reliability and stability of the system.

2 Sampling Circuit Design

The acquisition of AC voltage and current is one of the cores of the entire sampling device. Its sampling accuracy will directly affect the accuracy of electric energy calculation. Since the load management terminal often works in a harsh environment, EMC electromagnetic compatibility design and interference spike pulse removal should be considered during the design process to facilitate FFT algorithm operation and reduce errors.

This design uses a 5 V analog power supply and a 3.3 V digital power supply to power the chip. Since the stability of the chip's reference voltage directly affects the sampling accuracy, the circuit is connected to TI's voltage reference source REF3040 to provide a reference voltage reference for the chip AD73360, and a capacitor is added to the reference circuit to filter the ground to eliminate interference. Since the signal of the power grid is directly collected, the surge voltage or current that may appear in the power grid will have a great impact on the acquisition circuit, so a choke and a varistor are added to the front end of the transformer to enhance its ability to resist surge interference.

Since AD73360 uses oversampling technology, its front-end signal channel only needs a simple first-order low-pass filter to eliminate the aliasing effect. In the voltage sampling circuit shown in Figure 1, UAl and UN are the input signals of the voltage transformer, which are the voltage signals of the industrial network. Among them, SMBJ5. OCA can play the role of voltage stabilization and de-spiking pulses. The three capacitors play the role of filtering and smoothing. The accuracy of this voltage transformer is 0.1 level. In the current sampling circuit shown in Figure 2, IAl and INl are the current signals on the secondary side of the current transformer, which can be converted into voltage signals by a high-precision resistor of 26Ω (1%) and sent to AD73360 for sampling. The role of the capacitor is also filtering and smoothing. The accuracy of the current transformer is also 0.1 level.

Since the power load control terminal often works in a harsh environment, the "analog ground" and "digital ground" must be handled correctly. Since digital circuits are nonlinear, the switching of their logic gates will generate current shocks, so the high frequency on the digital ground will produce strong disturbances. Therefore, the digital ground and the analog ground cannot have a common path or loop, and only a single point connection should be used. In order to minimize the interference between the A/D analog part and the digital part, the digital and analog parts can be powered separately. Among them, 0.01μF ceramic capacitors and 4.7μF tantalum capacitors are used in parallel decoupling between the digital power supply and the analog power supply and the ground line. Figure 3 shows the connection circuit between the analog ground and the digital ground.

3 Interface Design

Such a suitable processor chip is an important guarantee for the accuracy of harmonic energy measurement results. The three-phase multifunctional harmonic energy meter is required to accurately measure the fundamental wave and the 2nd to 21st harmonics of each order of energy, and the required sampling frequency is fs≥2fmax=2x21x50 Hz=2 100 Hz. The FFT algorithm usually takes the number of sampling points as 2N. According to the conversion speed of AD73360 and the data processing speed of ADSP-BF53l. This design takes N=9, that is, the number of sampling points is 29=512. ADSPBF531 can achieve 600 million multiplications and additions per second at a main frequency of 300 MHz, which can fully meet the time requirements of various control, data conversion, reading and saving instructions of AD73360.

The ADSP-BF531 processor has two SPI-compatible ports that enable the controller to communicate with multiple SPI-compatible devices. The SPI port provides a full-duplex synchronous serial interface that supports master-slave mode and multi-master environment. In addition, the SPI baud rate and clock phase/polarity are programmable, and a DMA controller is integrated that can be configured to send or receive data streams. The SPI DMA controller can only perform unidirectional access at any given time. Therefore, during the transmission process, the SPI port can simultaneously complete the transmission and reception work on the two serial data lines by shifting data in and out. Its serial clock line can keep the data shifting and sampling synchronization on the two serial data lines.

The interface circuit of AD73360 and ADSP-BF531 is shown in Figure 4. Since both AD73360 and ADSP-BF531 support the industrial standard six-wire synchronous serial port, the interface circuit between the two is very simple. The four frame synchronization signals in Figure 4 are connected in a frame synchronization return loop mode, that is, the output frame synchronization signal SDOFS of AD73360 is output to the input frame synchronization signal SDIFS of AD73360, and the transmission frame synchronization signal TFS of BF531 is output to the reception frame synchronization signal RFS. In this way, whether it is the transmission frame synchronization signal or the reception frame synchronization signal, it will be forced to keep synchronization with SDOFS. The data input signal SDI and the data output signal SDO of AD3360 are respectively connected to the data transmission signal DX and the data reception signal DR of BF531. The flag output signal XF of BF531 is connected to the enable signal SE and reset signal of AD73360.

4 Software Design

The software flow of this system is shown in Figure 5. AD73360 has three working modes: programming mode, data mode and mixed mode. In programming mode, it only receives control words and outputs invalid conversion data; in data mode, the input control word is ignored and valid conversion data can be output; in mixed mode, control words are allowed to be received during data conversion. The serial interface of AD73360 can be connected to the industrial standard ADSP-BF531 device, and the connection rate of the serial port can be set by the DSP chip interface programming.

When the AD73360 works in program data mode, it will first enter program mode and write control words to the AD73360, and then switch to data mode. However, after reading data from the AD73360, the system will no longer switch back to program mode. In mixed mode, the system always switches between program mode and data mode to change its configuration during the AD73360 reading data.

The synchronous serial interface of AD73360 can recognize the control word with a length of 16 bits from DSP. Since the control word and conversion data of AD73360 are both 16 bits, the width of each word transmitted by BF531 should also be set to 16 bits. There are eight control registers inside AD73360, namely CRA~CRH, which occupy addresses 0~7 respectively, and each length is 8 bits. An important function of BF531 is that it can support DMA transmission. And at this time, data storage and access can be performed without CPU intervention. During the transmission process. Each frame of data includes 6 channel sampling values. And DMA is used for data reception, and an interrupt is generated after the six channels are received.

5 Conclusion

This paper analyzes and studies the application of chip AD73360 in power load control terminals, and has applied the research solution to actual products, thus achieving stable data collection in power load control terminals with good results.