Methods to improve signal integrity in video splitters

Publisher:chunyingLatest update time:2006-06-27 Source: 电子设计应用Keywords:impedance Reading articles on mobile phones Scan QR code
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  introduction

  It has always been difficult to deal with the signal integrity problem of high-speed electronic systems, especially as more and more chips operate at frequencies exceeding 100 MHz, and the edges of the signals become steeper and steeper (reaching the ps level). The performance of these high-speed devices The improvement further increases the difficulty of system design. At the same time, the continuous reduction of the volume of high-speed systems has led to a rapid increase in the density of PCB boards. Signal integrity issues have become an increasingly noteworthy issue in the design of new generation high-speed products.

  Signal integrity issues arise

  Signal integrity (SI) refers to the ability of a signal to respond with the correct timing and voltage in a circuit. Broadly speaking, signal integrity issues manifest themselves as reflections, crosstalk, ground bounce, and delays.

  reflection

  The reason for the reflection phenomenon is that there is no proper impedance matching at both ends of the signal transmission line. Part of the signal power is transmitted to the load through the transmission line, and the other part is reflected toward the source. Factors such as cabling geometry, improper termination, transmission through connectors, and power plane discontinuities can cause signal reflections.

  crosstalk

  Signal crosstalk is an electromagnetic coupling phenomenon caused by induced voltages and induced currents between signal lines that are not electrically connected. This coupling causes the signal line to act as an antenna, with capacitive coupling causing coupling currents and inductive coupling causing coupling voltages, which increase as clock speeds increase and design size decreases. When the alternating signal current on the signal line passes, an alternating magnetic field will be generated, and other signal lines in the magnetic field will induce signal voltages. In the low frequency band, the coupling between wires can be established as a coupling capacitance model; in the high frequency band, it can be established as an LC lumped parameter wire or transmission line model. In addition, the PCB layer parameters, signal line spacing, electrical characteristics of the driving end and receiving end, and signal line termination methods all have a certain impact on crosstalk.

  ground bomb

  Mainly due to the existence of distributed inductance caused by the power path and IC packaging. When the speed of the system is faster and the number of I/O pins that change logic states at the same time is larger, larger transient currents will be generated, causing voltage fluctuations and changes on the power line and ground line. This is what is usually called Ground bounce. Ground bounce noise can cause malfunctions in the logic operation of the system.

  Delay

  Delay refers to the signal transmission at a limited speed on the wires of the PCB board, and the transmission delay of the signal from the sending end to the receiving end. The delay of the signal will have an impact on the timing of the system. In high-speed digital systems, the transmission delay mainly depends on the length of the wire and the dielectric constant of the medium around the wire.

  Ways to ensure signal integrity

  Improve reflection

  Reflections are one of several important sources of interference. In order to improve the reflection caused by line impedance mismatch, you can choose to use wiring topology and terminal matching.

  Using appropriate wiring topology to improve reflections usually does not require the addition of additional electronic components. Common wiring topology methods include: tree method, daisy chain method, star method and loop method, as shown in Figure 1. Among them, the tree method is the worst wiring method, which causes the largest amount of reflection and is prone to additional load effects and ringing phenomena; the daisy chain method is a better wiring method, suitable for address or data buses and parallel terminals. Wiring; the star method is suitable for wiring of series terminals, but the condition is that the output buffer (driver) must have low output impedance and high driving energy; the loop method is basically similar to the daisy chain method, but the loop method will consume more The loop area is small, and the immunity to common mode noise is poor.

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               Figure 1 Cabling topology

  In addition to the wiring topology method, terminal matching is the most effective method to overcome the interference of reflection phenomena. The characteristic impedance of a transmission line is generally a fixed value. For CMOS circuits, the output impedance of the signal driving end is relatively small, while the input impedance of the receiving end is relatively large. A resistor can be matched at the final receiving end of the signal, so that the result of the parallel connection between the matching and the receiving end can match the characteristic impedance of the transmission line, and the signal performance is better improved.

  Solve crosstalk

  In circuit design, inductive crosstalk is usually larger than capacitive crosstalk, so the mutual inductance between conductors can be considered. The inductive crosstalk coefficient C between two conductors can be obtained by the following formula:

  

  Among them, the constant K depends on the signal establishment time and the interference length (parallel length) of the signal line, H is the distance from the signal line to the flat formation, and D is the distance between the centers of the two interference lines. The calculation of the K value is very complicated, but since it is always less than 1, the worst case of the crosstalk coefficient is:
   

  It can be seen from the above two equations that the main ways to reduce crosstalk are: increasing the distance between lines as much as possible (increasing D), placing the signal line as close to the ground layer as possible (decreasing H), and reducing the parallel length of the two lines ( Reduce the K value). From a practical point of view, the most feasible method is to increase the distance between lines.

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    Figure 2 Video distributor structure diagram

   Figure 3 Ideal transmission line model

  Suppress ground bounce

  To suppress the impact of ground bounce, the first step is to reduce the distributed inductance of the IC package. Secondly, IC packaging technology with smaller distributed inductance is used. Surface mount packaging usually has 30% lower ground bounce than DIP packaging. The next step is to reduce the amount of distributed inductance on the printed circuit board side. Because inductance is directly proportional to the length of the conductor and inversely proportional to the width, bounce is prone to occur in high-speed digital systems. One or more ground layers can be placed on the inner layer, and the ground layer area is wide, which can reduce the inductance of the ground loop. In addition, when designing the circuit, try to avoid letting a certain logic gate drive too many loads. Because in a digital circuit, if there are multiple logic devices connected in parallel, the total input capacitance is the sum of the input capacitance of each logic device.

  Video Splitter Signal Integrity Analysis

  When providing one output video signal to multiple video devices, you should consider using a VGA video splitter. There are two main ways of implementation: transistor amplification driving multiple outputs and integrated chip video distributor. Due to the low power supply voltage of the former, the dynamic range of the circuit is small, and the high-frequency attenuation is large, it can only be used in situations where the requirements for these two aspects are not high. Therefore, in order to enable the designed distributor to achieve high-fidelity transmission, this article uses an integrated chip as the video driver.

  A 15-pin VGA female plug is used as the video signal input and output interface. After the signal passes through the VGA plug, it is divided into line, field and R, G, and B signals and output respectively. The horizontal and field signals are amplified by transistors to the output end. The R, G, and B signals are driven by the integrated chip MAX4020 video amplifier and filtered by the terminal filter network before being sent to the output end, as shown in Figure 2.

  MAX4020 is a unity gain amplifier, driven by +5V power supply, and the output current can reach 120mA. In the design of VGA splitter, the most prominent issue of signal integrity is impedance matching. The ideal transmission line L is driven by the digital signal driving source Vs with internal resistance R0. The characteristic impedance of the transmission line is Z0 and the load impedance is RL, as shown in Figure 3. If the terminal impedance (point B) does not match the transmission line impedance (point A), reflection will occur, and the reflected voltage amplitude is determined by the load reflection coefficient ρL. ρL can be obtained from the following formula:

  ρL=(RL-Z0)/(RL+Z0)

   When the voltage reflected from the terminal reaches the source terminal, it can be reflected back to the load terminal again, forming a secondary reflection. At this time, the amplitude of the reflected voltage Determined by the source reflection coefficient ρs, ρs can be obtained from the following formula:

  ρs=(R0-Z0)/(R0+Z0)

  It can be seen from the above formula that as long as the design of the matching circuit satisfies the source impedance R0 to be equal to the characteristic impedance Z0 of the transmission line, or the load impedance RL is equal to the characteristic impedance Z0 of the transmission line.

  In actual circuit design, the termination matching method is generally adopted in which the source end impedance is equal to the load end impedance, and a resistor pulled down to ground is added to the load end to achieve matching. Since the system load impedance is 75Ω and the chip output resistance is 8Ω, it only needs to be connected in series with a 67Ω matching resistor RTO at the source end. The inserted series resistor resistance plus the output impedance of the driving source should be greater than or equal to the transmission line impedance (slightly over-damped). This matching method makes the reflection coefficient at the source end zero, thereby suppressing the signal reflected from the load. The advantage is that each line only requires one termination resistor, does not need to be connected to the power supply, and consumes little power. The image obtained during actual debugging has no ghosting or snowflakes, but is slightly darker. The reason is that with this termination method, the source-end matching resistor divides the voltage in the output circuit, causing the image to appear darker.

  Configure the circuit as shown in Figure 4: Add a grounding resistor RG to the feedback terminal to amplify the driving voltage of the circuit. During the design, it should be noted that the resistance selection of the feedback resistor RF and the input resistor RG must comply with the system configuration. Excessive resistance will increase voltage noise, affect the input capacity of the amplifier, produce unnecessary poles and zeros, reduce bandwidth and even cause oscillation. Debugging result: The image is displayed the same as the input.  

  Simulation analysis

  In modern high-speed circuit design, simulation analysis tools can give designers accurate and intuitive feedback on design results, making it easier to detect hidden dangers early, make timely modifications, shorten design time, and reduce design costs.

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             Figure 4 MAX4020 configuration schematic

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             Figure 5 Hyperlynx simulation results

  BoardSim is a simulation tool developed by HyperLynx. BoardSim is used to quickly analyze signal integrity, electromagnetic compatibility and crosstalk problems in the design after wiring, generate crosstalk intensity reports, and distinguish and solve crosstalk problems. The simulation results of the circuit without impedance matching and after impedance matching are shown in Figure 5. It can be seen that the voltage waveform at the receiving end of the oscilloscope without impedance matching has large overshoot and undershoot, so that the receiving end IC will receive a very steep clock signal every cycle, and such a waveform will Will cause strong electromagnetic radiation. The simulation of the matching circuit found that the signal integrity problem was well solved.

  Conclusion

  This article analyzes the signal integrity issues in high-speed circuit design, proposes some measures to improve signal integrity, and combines the design process of a VGA video distributor system with a detailed analysis of methods to improve signal integrity. Practice has proven that correct circuit design combined with reasonable modeling and simulation is an effective measure to solve signal integrity problems in high-speed system design.

Keywords:impedance Reference address:Methods to improve signal integrity in video splitters

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