Design of High-speed Arbitrary Waveform Generator

Arbitrary waveform generator is one of the fastest growing products in electronic measuring instruments. It can output standard function signals as well as non-standard function waveform (arbitrary waveform) signals defined by the user, and has rich analog modulation (AM, FM, PM) and digital modulation (FSK, PSK) functions, which can provide various standard or non-standard signals for different application fields. It is an indispensable signal generator, especially in the development, production and maintenance of underwater sonar, communication, radar navigation, electronic countermeasures and other equipment. Based on digital frequency synthesis technology,
a design scheme of high-speed arbitrary waveform generator is given.

1 Hardware design of high-speed arbitrary waveform generator

1.1 Working Principle of Arbitrary Waveform Generator

At present, there are two solutions for generating arbitrary waveform generators. One solution is to use direct digital frequency synthesis (DDS) technology to generate arbitrary waveforms. The working principle is shown in Figure 1.

A standard DDS circuit should consist of the following parts, namely phase accumulator, waveform memory, D/A converter, low-pass or band-pass filter. The arbitrary waveform data is pre-written into the waveform memory through the human-machine interface. The function of the phase accumulator is to sample the clock phase output by the reference oscillator according to the input frequency control word. When the step size of the phase accumulator is K. The output frequency of the arbitrary waveform In the formula

, Fs is the fixed sampling clock frequency, n is the length of the phase accumulator, and the output frequency of the DDS can be changed by changing the frequency control word K.

The arbitrary waveform generator constructed by DDS technology has the advantages of high output frequency resolution and continuous frequency change phase, but it also has two important defects. First, when the phase increment step of the phase accumulator is large, the output waveform will produce jitter; second, because DDS technology does not read the data in the waveform memory point by point, the output waveform will lose a lot of useful information.

Another design scheme of arbitrary waveform generator is shown in Figure 2. Its working principle is that the clock of arbitrary waveform generator changes the output address of address generation circuit composed of counter by adding 1 to counter. Counter sequentially scans each address in waveform memory until the end of waveform data. Waveform data in each address is sent to D/A converter to convert digital signal into analog signal. Then the output signal of D/A converter needs to pass through low-pass filter to smooth the transition edge of D/A converter output signal to obtain the required arbitrary waveform. In this scheme, all waveform data are sent to D/A converter, so waveform data will not be lost. However, the waveform data content defined in waveform memory must be fully output, and the output signal frequency of arbitrary waveform is variable, so the sampling clock frequency must be variable, which is obviously different from arbitrary waveform generator composed of DDS. Output frequency of arbitrary waveform using this scheme

Where Fs is variable sampling clock frequency.

The circuit structure of this scheme is simple and can output complex arbitrary waveforms, which is most suitable for high-speed arbitrary waveform generators. The sampling rate of the arbitrary waveform generator based on this scheme can reach 200 million times/second, and the maximum output frequency of the arbitrary waveform can reach 50 MHz. The block diagram of the overall circuit of the high-speed arbitrary waveform generator is shown in Figure 3.

1.2 Design of arbitrary waveform generation circuit

As shown in Figure 4, a complete arbitrary waveform generation circuit is mainly composed of a clock generation circuit, an address counter, a waveform memory, a latch, an odd-even data selection circuit, and a D/A converter.

The clock generation circuit is used to generate the variable clock required by the arbitrary waveform generator. It can usually be composed of a phase-locked loop circuit controlled by a single-chip microcomputer. In the actual design, a phase-locked loop integrated circuit is used to generate a clock signal with a maximum frequency of 100 MHz. The output signal of the clock circuit is sent to the clock input of the address counter to drive the address counter to scan the data in the waveform memory. The address counter uses a 15-bit binary synchronous counter, which is logically equivalent to 4 74F161 cascades. The 15-bit address data output by the address counter is connected to the address input of the waveform memory. The waveform memory uses four 32K×8 (read and write speed is 12 ns) SRAMs cascaded into a 32K×32 SRAM array. Among the 32-bit data at the output of the SRAM array, 24 bits are waveform data, 2 bits are control signals, and the remaining 6 bits of data lines are not used. The resolution of each waveform point is 12 bits, and each address stores the data of two waveform points. The single-segment arbitrary waveform signal can be up to 64K points. The two control signals are stop bit and synchronization bit. The stop bit data line is connected to the preset number control terminal of the address counter through a D flip-flop. When it is detected that the last waveform address is scanned, the stop bit sets the preset number control terminal of the address counter. In this way, when the next clock arrives, the address counter addresses the first address of the arbitrary waveform and reads the waveform data. The synchronization bit in the control signal is used to output an external synchronization signal. The 24-bit arbitrary waveform data output by the waveform memory is latched by the latch and sent to the input end of the 12-bit odd-even data selection circuit. As mentioned above, each address of the waveform memory stores the waveform data of two points. When the waveform data is written to the waveform memory through the human-machine interface, the waveform data of one point is composed of the odd-numbered bits in each address, and the data of the other point is composed of the even-numbered bits. The advantage of this is that when each sampling clock arrives, the data of two waveform points can be read at the same time, so that the maximum frequency of the output waveform is increased by 1 times, which is equivalent to the frequency of the sampling clock being increased by 1 times, greatly improving the performance of the instrument. The 12-bit parity data selection circuit is logically equivalent to three 74F157s. The output of the parity data selection circuit is connected to the input of the D/A converter. The function of the D/A converter is to convert the digital signal read from the waveform memory into an analog signal. Since the maximum clock frequency is 100 MHz, the D/A converter selects the AD975 with a rate of 125 million times/second. According to the sampling law, the fundamental frequency of the output signal will be lower than half of the reference clock frequency used. In this scheme, the maximum sampling clock frequency is 100 MHz. An arbitrary waveform can be composed of at least 4 points, and two waveform data are read in each clock cycle. Therefore, the maximum frequency of the output arbitrary waveform signal is 50 MHz. In the above circuit, the 15-bit synchronous binary address counter, 24-bit latch, 12-bit parity data selection circuit and related control circuit can also be implemented by high-speed CPLD.

1.3 Filter Design

The signal after D/A conversion usually contains more clock components and steeper transition edges. In order to reduce the jitter of the output waveform and suppress high-order harmonics, it is very important to choose an effective filter in the design of the arbitrary waveform generator. The high-speed arbitrary waveform generator can output sine waves, triangle waves, sawtooth waves, pulse waves and arbitrary waveforms. Therefore, filters with different performances should be selected according to different frequency bands and waveforms. The elliptic filter has a steep transition characteristic and is suitable for use as an output filter for sine waves. The triangle wave, sawtooth wave and arbitrary wave have rich frequency spectra. Therefore, the filter is required to have good amplitude-frequency characteristics within the passband range to ensure that the signal does not produce distortion after passing through the filter and can filter out stray signals. Elliptical filters will produce violent ringing for waveforms other than sine waves, while Gaussian filters with linear phase can meet these requirements. In this scheme, since the sampling clock of the arbitrary waveform generator is variable, the cutoff frequency of its low-pass filter must also be changed, otherwise it will not play a filtering role in some frequency bands, or the useful signal will be attenuated in the high-frequency band. For this reason, this design scheme uses a seventh-order elliptical filter with a cutoff frequency of 25 MHz and 50 MHz and a Gaussian filter with a cutoff frequency of 20 MHz, which are selected by the microcontroller according to different situations. Figure 5 shows the circuit of a seventh-order elliptical filter with a cutoff frequency of 50 MHz and a Gaussian filter with a cutoff frequency of 20 MHz.

1.4 GPIB interface design

Although there are many new interface standards in intelligent instruments, such as USB, LAN, etc., the GPIB (General Purpose Interface Bus) interface is still recognized by the industry as the standard interface for intelligent instruments. In this solution, the GPIB interface is used to download data from the PC to the arbitrary waveform generator, and the arbitrary waveform generator can be remotely controlled through the GPIB bus. The GPIB interface circuit is composed of the NAT7210 GPIB dedicated integrated circuit produced by NI and the GPIB bus drivers SN75160 and SN75162 produced by TI. The NAT7210 outputs standard GPIB format data, which complies with the IEEE488.2 standard. The function of the GPIB bus driver is to enhance the driving ability of the interface. For the connection method between NAT7210 and SN75160, SN75161 and the microcontroller, please refer to the literature.

2 Software design of high-speed arbitrary waveform generator

The software of the high-speed arbitrary waveform generator includes two parts: the waveform editing and downloading software of the PC part and the single-chip control software inside the instrument. The waveform editing and downloading software has various arbitrary waveform editing capabilities, such as straight line editing mode, curve editing mode, formula editing mode, and modulation waveform editing mode. The waveform editing and downloading software can communicate with the arbitrary waveform generator through the GPIB interface to complete the download of arbitrary waveform data and remote monitoring of the instrument. The single-chip control software structure inside the instrument adopts the classic main program loop and interrupt service mode, and its flow chart is shown in Figure 6. After the instrument is powered on, it first performs self-test and software and hardware initialization, and then enters the main program loop. The main program loop is the process of waiting for interrupt processing. It determines the interrupt source based on the interrupt request, opens the interrupt and turns to the corresponding interrupt processing subroutine to complete the corresponding operation or hardware control.

3 Conclusion

After testing the completed arbitrary waveform generator prototype, it was found that the arbitrary waveform generator using this solution can output arbitrary waveforms as low as 10 MHz and as high as 50 MHz. The output waveform is stable and there is no waveform data loss. Through the waveform editing software on the PC, a wide variety of arbitrary waveforms can be generated, which can be widely used in various fields such as national defense, scientific research, education and industrial production.