Comparison of performance of DC and pulse electroplated Cu interconnects

0 Introduction

With the continuous improvement of chip integration, Cu has replaced Al as the mainstream interconnection material in ultra-large-scale integrated circuit interconnection. In current chip manufacturing, the wiring and interconnection of chips are almost all obtained by direct current plating to obtain Cu plating. In direct current plating, as metal ions approach the cathode and are continuously deposited, concentration polarization is inevitably caused. When the current is turned on in pulse plating, the metal ions close to the cathode are fully deposited; when the current is turned off, the discharged ions around the cathode return to the initial concentration. The main advantages of pulse plating are: reducing concentration polarization, increasing cathode current density and plating efficiency; improving the physical properties of the coating; the resulting coating has good protection; and a dense low-resistivity metal deposition layer can be obtained.

The theory of pulse plating was proposed in the early 20th century. In recent years, some studies on the application of pulse plating in integrated circuit Cu interconnection have been published abroad [1-5]. At present, the research on pulse plating Cu in China is mainly focused on metallurgical plating and printed circuit board (PCB) wiring. There are almost no literature reports on the application of pulse plating in integrated circuit Cu interconnection [6-8]. In the manufacture of integrated circuits (ICs), mature DC plating processes are used. The characteristic size of the lines in PCBs is about tens of microns, while the characteristic size of the Cu interconnection in the chip is 1μm. Therefore, it is particularly necessary to study the performance of submicron-thick Cu plating. This paper will focus on the integrated circuit chip Cu interconnection technology and study the performance of Cu plating deposited by pulse plating and DC plating respectively.

1 Experimental use

200mm p-type (100) Si wafer, first deposit 800nm ​​SiO2 dielectric layer on the Si wafer by PECVD (connection 200mm dielectric system, Novellus). Then use PVD (Invoa 200, Novellus) to sputter 25nm TaN/Ta diffusion barrier layer, and then use PVD to sputter 50nm Cu seed layer. In the electrolytic cell, the anode is a high-purity Cu rod, which is wrapped with a filter membrane. Its function is to prevent solid insoluble impurity particles from entering the Cu coating during electroplating and affecting the coating performance. The small rectangular slices after slicing the 200mm Si wafer with Cu seed layer sputtered by PVD are used as cathodes (5cm×2cm). There is a magnetic stirrer at the bottom of the electrolytic cell near the cathode. During electroplating, the magnetic stirrer placed under the electrolytic cell generates a magnetic field to drive the stirrer to rotate at a constant speed. The speed is set to 400r/min. This can keep the Cu ion concentration in the electrolyte near the cathode normal during the electroplating process, reduce concentration polarization, increase cathode current density, and accelerate the deposition rate.

The composition of the plating solution is Cu2+17.5g/L, H2SO4175g/L, C1-50mg/L, accelerator 2mL/L, inhibitor 8mL/L and leveler 1.5mL/L (additives are all from Enthone, USA). C1- can improve the brightness and leveling of the coating, reduce the internal stress of the coating, and enhance the adsorption of the inhibitor. The accelerator is usually an organic matter containing S or other functional groups, including thiourea and its derivatives. Its function is to promote the nucleation of Cu and make the growth rate of each crystal surface tend to be uniform. The inhibitor includes polyethylene glycol (PEG), polypropylene glycol and copolymers of polyethylene glycol, etc. Its function is to form a continuous film on the cathode surface together with C1- to prevent the deposition of Cu. The leveler is usually a heterocyclic compound, generally containing N atoms, and its function is to reduce the surface roughness of the coating.

For pulse plating, considering the potential difference between the coating and the electrolyte interface, a double electric layer will be formed on the coating surface, which is equivalent to a capacitor. If the pulse frequency is too large, the double electric layer capacitor will not have time to charge and discharge during the pulse width and pulse interval, and the pulse current will be close to the DC current. However, if the pulse frequency is too small, the current efficiency will become very low, so the pulse width and pulse interval are generally selected in the millisecond level. According to the research results of literature [9], ton = 8ms, toff = 2ms are fixed to study the influence of different average current densities. In the experiment, by setting different current densities and corresponding electroplating times, the thickness of the Cu coating is strictly controlled at 1μm. Square wave pulses are used in the experiment, and the measured parameters of the Cu coating film include resistivity, XRD, SEM and AFM.

2 Results and Discussion

2.1 Resistivity measurement results

Figure 1 shows the relationship between the resistivity of the electrodeposited Cu layer and the current density. It can be seen that the resistivity of the Cu coating obtained by pulse electroplating is lower than that of the DC coating at the same current density. At low current density (<2A/dm2), the resistivity of both the DC coating and the pulse coating is relatively large.

2.2 XRD measurement results

In XRD measurements, the texture coefficient TC (texture coefficient) of the crystal plane (hkl) is used to characterize the degree of crystal plane preference [10].

Where: I (hkl) and I0 (hkl) represent the diffraction line intensity of the deposited layer sample and the standard sample (hkl) crystal plane respectively; n is the number of diffraction peaks. When the TC values ​​of each diffraction plane are the same, the crystal plane orientation is disordered. If the TC value of a certain (hkl) plane is greater than the average value, the crystal plane is preferred. The larger the TC value of the crystal plane, the higher its degree of preference.

Figure 2 (a) and (b) show the relationship between the texture coefficient and current density of the DC coating and the pulse coating, respectively. The ability of the (111) crystal plane to resist electromigration is four times that of the (200) crystal plane, so the (111) crystal plane is more conducive to interconnection. The change trends of the two figures are similar, and the main crystal planes are (111) and (200), but the preference of (111) in the DC coating is slightly better than that in the pulse coating. After XRD of the Cu seed layer, it was found that the (200) crystal plane in the seed crystal Cu showed absolute preference. Therefore, the XRD results show that the ability of the crystal plane of DC plating to resist electromigration is better than that of pulse plating. Since the 1μm Cu electroplating layer is too thin, the coating is affected by the strong matrix effect, and the electrodeposition conditions have little effect on the crystal plane. Therefore, the crystal plane of the seed layer determines the crystal plane of the coating to a large extent. It has been reported in the literature that when the Cu coating exceeds 4μm, it is basically not affected by the substrate epitaxy, but is mainly determined by the electrodeposition conditions, forming an absolutely dominant preferred crystal plane orientation.

2.3 AFM measurement results

Figure 3 shows the relationship between the surface roughness RMS (root means quarter) and the current density of the Cu coating deposited by pulse plating and DC plating. It can be seen that the surface roughness of the coating obtained by pulse plating is only a few nanometers, while the surface roughness of the coating obtained by DC plating is more than 10nm, and the maximum even reaches 40nm. Such a large roughness will cause great difficulties for the subsequent CMP process. The flat surface can provide a base surface that is easy to process for the CMP process. The surface roughness RMS of the Cu coating obtained by pulse plating is lower than that of DC plating.

2.4 SEM measurement results

Figure 4 shows SEM photos of Cu coatings deposited by pulse electroplating and DC electroplating. Since organic additives will greatly affect the growth process of Cu grains, in order to examine the effect of electroplating conditions on grain growth, SEM measurements were taken on the coatings obtained without the three additives. It can be seen that at the same current density, the surface grain density of the coating obtained by pulse electroplating is much greater than that of DC electroplating. The reason for this difference is that although the pulse off time does not contribute to the electroplating efficiency, it is not a "dead time". Some phenomena that have a great influence on the electrocrystallization process may occur during the off period, such as recrystallization, adsorption and desorption. During the off time, the grains will grow, which is due to the recrystallization of the grains during the off time. From the laws of thermodynamics, it can be seen that the larger the grains, the more stable they are. Larger grains are usually required in the interconnection of integrated circuit chips, because large grains have fewer grain boundaries, a smaller probability of electron deflection, a smaller resistivity, and a stronger ability to resist electromigration [11].

3 Conclusion

This paper studies the resistivity, texture coefficient, grain size and surface roughness of the Cu coatings obtained by pulse electroplating and DC electroplating. The experimental results show that under the same current density, the Cu coating obtained by pulse electroplating has lower resistivity, smaller surface roughness, larger surface grain size and grain density, while the (111) crystal plane preference of the coating obtained by DC electroplating is better than that of pulse electroplating. Pulse electroplating has a stronger control over the electrodeposition process, can reduce concentration polarization, improve the physical properties of the coating, and obtain a dense low-resistivity metal electrodeposition layer. The obtained coating is superior to DC electroplating in many aspects. In the Cu interconnection technology of ultra-large-scale integrated circuits, pulse electroplating will have a good research and application prospect.