8 (eight) way trigger latch circuit
The figure shows an 8-way trigger latch circuit. In the figure, 74HC373 is an 8D latch. At the beginning, when all switches are not pressed, the latch outputs are all high level, and the feedback signal after the 8-input NAND gate and NOT gate is still high level. This signal is used as the latch enable end control signal to make the latch wait for receiving the trigger input state; when any switch is pressed, one of the output signals must be low level, then the feedback signal becomes low level, the switch just received by the latch is latched, and the input of other switch information will be blocked. It can be seen that the trigger latch circuit has the characteristics of a timing circuit and is the key to realizing the function of a buzzer. You
can also use a JK trigger to realize the function of the trigger latch circuit. Please consider the specific implementation method yourself.
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