EDA tools provide a portable and efficient design environment

my country's portable energy consumption market will increase its purchase volume by 30%-50% compared to 2011. With the replacement of FPGA silicon chips, the number of gates of FPGA products continues to increase, and the performance and special functions are gradually strengthened, making FPGA able to replace the role that only ASIC and ASSP could play in the field of electronic systems. However, FPGA must be assisted by appropriate design tools to allow designers to fully play its role, otherwise no matter how good the product is, it will be meaningless.

Provide a portable and efficient design environment

For hybrid system architecture development, we provide the rapid system modeling platform Impulse C for building system models.

Today, FPGA has entered the era of silicon chip integration, integrating DSP, ARM, etc. This hybrid system architecture requires a better development environment, such as embedded software tool OS support, DSP programming, C language-based programming tools, system interconnection, synthesis and simulation, and timing analysis. To this end, Aldec provides an advanced ESL (Electronic System Level)-based rapid system modeling platform Impulse C for the development of hybrid system architecture to build system models. In this environment, designers can use high-level language C to describe the system, quickly build the target system model, and verify it. Once the system model is established, the established system model can be divided into software and hardware and co-verified in the Impulse C environment to ensure that the established system model can meet the requirements of the target system. Then, through C synthesis, the hardware part of the system is automatically optimized to the target FPGA, and the system software and hardware interface and interconnection information are automatically generated.

For C language synthesis solutions, Aldec's Impulse C can provide fast and reliable conversion from C language-based design/algorithms to RTL-level descriptions; it can provide complete and reliable system design verification, rich system optimization methods, and a wide range of target platform support. Impulse C also supports the design of embedded hardware and software acceleration systems and computing acceleration systems. For C-based applications, the HDL code converted by Impulse C provides the source and basis for later static rule detection, dynamic verification, and design evaluation, thereby ensuring the reliability of HDL design.

For FPGA design, Aldec provides a complete and leading design verification solution in the industry, among which Active-HDL is a management, development, input, simulation and verification analysis system. It integrates various tools in FPGA design, and combines multiple design input methods, simulation debugging technologies, manufacturers' and third-party synthesis and implementation tools, and all mainstream manufacturers' libraries. It provides engineers with an easy-to-use, powerful, high-performance and efficient solution, enabling designers to design complex and cost-effective electronic products at the fastest speed, greatly shortening the product design cycle. Active-HDL provides a variety of design input support, and greatly improves the simulation speed by adopting a variety of patented technologies. The tool can support single-core hybrid simulation. In addition, Active-HDL also provides a variety of practical and powerful timing analysis and error correction methods to speed up the debugging process and maximize reliability.

For static rule checking, Aldec provides Alint as a comprehensive, efficient, and multi-level rule checking tool. Alint adopts the checking principle of PBL (Phase-Based Linting) methodology, provides support for mainstream rule libraries (such as STARC, DO-254, RMM, etc.), and starts from design input to ensure the quality and reliability of later logic implementation, thereby shortening the development cycle and reducing costs.

In response to higher demands for simulation verification acceleration, Aldec provides the HES hardware-level simulation verification acceleration platform, which has a number of proprietary technologies to ensure an order of magnitude leap in simulation verification speed. At the same time, the physical verification environment ensures the reliability of logic design.

In short, Aldec's tools can provide a convenient and efficient design environment, safe and reliable design assurance, and significant design/verification/simulation efficiency.

Demand for third-party professional EDA tools continues to grow

The application scope of FPGA is becoming wider and wider, which brings new business opportunities and challenges to third-party tool and development platform providers.

The current mainstream FPGA device manufacturers also provide some development kits, but most of these development tools can only meet the functions required by the basic development process, and mainly focus on back-end synthesis, layout and routing, the physical structure of FPGA chips and the development of new devices. There is little support for the most important front-end design, verification and evaluation, all of which require support from professional third-party EDA tools.

As the division of labor becomes more and more specialized, FPGA device manufacturers will invest a lot of energy in upgrading FPGA device technology, improving the degree of integration, reducing power consumption, expanding hardware functions, etc., while the software design and verification of programmable chips require the support of increasingly powerful third-party EDA tools. Third-party professional EDA manufacturers will focus their main efforts on the development of professional software for programmable device design verification, and aim to improve the efficiency, reliability and accuracy of the design, while FPGA suppliers focus on providing FPGA devices with better performance, higher integration and lower unit power consumption. Professional EDA manufacturers pay more attention to the convenience of design, the diversity of verification and the reliability of design results, and will provide seamless connection and collaborative development solutions with FPGA device manufacturer tools and other platforms.

To sum up, device manufacturers and professional third-party EDA tool manufacturers are an inseparable industrial alliance that complements each other, forming an indispensable and interdependent ecological environment. For ordinary users, with the deepening of FPGA device applications, the expansion of scale, and the increase in complexity, there will inevitably be a continuously growing demand for third-party professional EDA tools.

The application scope of FPGA is getting wider and wider, and has expanded from the communication field to the industrial, consumer, medical and other fields. These changes have brought new business opportunities and challenges to third-party tool and development platform providers. FPGAs used in communication, industrial, consumer, medical and other fields should be designed based on a complete professional design process and verification process. Based on this, EDA tool manufacturers should provide full-process design verification tools for FPGA designs in different industries, such as design management, design dynamic simulation, debugging, coverage analysis, static rule checking, physical and semi-physical verification tools, as well as special solutions for special technical fields, such as collaborative acceleration solutions for SoC and SoPC fields.