EDA Technology Hangzhou Electric Co., Ltd. Guo Yushun

The goal of the course is to enable students to master the means, methods and ideas of hardware description language design of digital systems through the study of this course and other related courses, master commonly used EDA development software, and integrate HDL hardware description language programming methods and FPGA development technology and conform to Engineering specifications and system design techniques are organically integrated. At the same time, we can understand the latest developments in the subject, connect theory with practice, and cultivate students' practical ability and comprehensive innovation ability.

• Chapter 1：Introduction to EDA Technology The Development of EDA Technology (51 minutes and 49 seconds)

• Chapter 2：Introduction to EDA Technology Modern Digital System Design (43 minutes and 12 seconds)

• Chapter 3：Introduction to EDA Technology ASIC and FPGA (46 minutes and 22 seconds)

• Chapter 4：Overview of PLD and the structural principle of simple PLD (36 minutes and 3 seconds)

• Chapter 5：Structural principles of CPLD and FPGA (32 minutes and 30 seconds)

• Chapter 6：Overview of large-scale PLD products (41 minutes and 37 seconds)

• Chapter 7：Description of digital circuits (41 minutes and 36 seconds)

• Chapter 8：Description of the behavior of the circuit 1 (38 minutes and 4 seconds)

• Chapter 9：Description of the behavior of the circuit 2 (40 minutes and 46 seconds)

• Chapter 10：Flip-flops and latches description (44 minutes and 41 seconds)

• Chapter 11：Assignment of two types of procedures (46 minutes and 25 seconds)

• Chapter 12：Basic sequential circuit description (52 minutes and 26 seconds)

• Chapter 13：How to describe combinational circuits (37 minutes and 43 seconds)

• Chapter 14：Description of complex combinational circuits (45 minutes and 49 seconds)

• Chapter 15：Tri-state gates and bidirectional ports (38 minutes and 36 seconds)

• Chapter 16：Overview of LPM and application of LPM arithmetic module (33 minutes and 12 seconds)

• Chapter 17：LPM memory application (40 minutes and 7 seconds)

• Chapter 18：LPM module application examples (36 minutes and 19 seconds)

• Chapter 19：Finite State Machine-1 (36 minutes and 25 seconds)

• Chapter 20：Finite State Machine-2 (39 minutes and 59 seconds)

• Chapter 21：Finite State Machine-3 (35 minutes and 19 seconds)

• Chapter 22：HDL description level and style (48 minutes and 2 seconds)

• Chapter 23：RTL description and design (1) (39 minutes and 15 seconds)

• Chapter 24：RTL description and design (2) (40 minutes and 10 seconds)

• Chapter 25：Verilog behavioral simulation (41 minutes and 50 seconds)

• Chapter 26：Verilog behavioral simulation (35 minutes and 16 seconds)

• Chapter 27：Verilog behavioral simulation (23 minutes and 52 seconds)

• Chapter 28：Resource optimization methods (37 minutes and 58 seconds)

• Chapter 29：Speed ​​optimization method (36 minutes and 35 seconds)

• Chapter 30：Timing analysis (38 minutes and 47 seconds)