Why does ground bounce occur when there is unnecessary voltage on the ground line?

Figure 2.16 depicts a four-pin dual in-line package device with die leads connected to an ideal logic device. It contains a transmission circuit and a circuit. The transmission circuit is a push-pull output circuit, and in fact any circuit structure will also have this problem at high speed.

Assume that the switch B of the output driver has just been turned off, and the load capacitor C is discharged to ground. As the capacitance decreases, its accumulated charge flows to ground, forming a large current surge in the ground loop, marked as: I discharge in the figure.

As the discharge current builds up and then decays, this current change acts through the inductance of the ground pin, inducing a voltage VGND between the system ground plane outside the device and the ground inside the package. The value of this voltage is equal to:

The shift in the internal reference ground potential due to output switching is called "ground bounce".

Compared with the full-scale output voltage, the ground bounce voltage VGND is usually very small. It does not seriously weaken the transmitted signal, but it seriously interferes with the reception.

Now consider the receiver circuitry within the same die. The receiver performs a differential comparison of the input voltage VM with its local internal reference ground. This differential operation can be seen in Figure 2.16 as the positive input connected to VIN minus the negative input connected to the internal ground. Because the internal ground carries the VGND noise pulse, the actual voltage difference seen by the input circuit is equal to:

Because the input circuit responds to the difference between its positive and negative inputs, it has no way of knowing whether the noise pulse, VGND, is being added to the negative input or subtracted from the positive input. In other words, from the perspective of the input circuit, the VGND pulse looks like noise superimposed directly on the input signal.

If N outputs corresponding to N capacitive loads on the same chip are converted simultaneously, N times the ground current will be obtained, so the increase of the pulse VGND will also be nearly N times.

The ground bounce voltage is proportional to the rate of change of current through the ground pin. When driving a capacitive load, we expect the rate of change to look like the second derivative of the voltage. Referring to Figure 2.14, the second derivative of the voltage is a double-peaked waveform that first bulges upward and then sags downward.