Design of multi-channel signal source based on DDS

This article uses the C8051F020 microcontroller to realize the connection control of the AD9959 frequency synthesis chip, and combines a small amount of peripheral circuits to form a complete low-noise, low-power, high-stability, and high-reliability frequency synthesizer. The direct frequency synthesizer of this signal source will control the register of the AD9959 chip by programming the standard SPI port of the microcontroller C8051F020, thereby realizing the output of three coherent signals of single-frequency 12MHz, 48MHz and 30MHz bandwidth linear frequency modulation.

1 System design and functional unit introduction

1.1 System Design

The main control chip of this design adopts Xinhualong's C8051F020 single-chip microcomputer, the signal generation chip adopts the 4-channel DDS chip AD9959 of ADI Company, and the power supply part adopts a regulated switching power supply that can provide 5 V and 3.3 V. The design block diagram of the system is shown in Figure 1.

1.2 AD9959 chip

AD9959 is a four-channel, low-power, high-speed direct digital frequency synthesizer newly launched by ADI in the United States, with a sampling frequency of up to 500 MSPS. The chip integrates 4 DDS cores inside, and can independently program 4 internal synchronous output channels. Its independent channels are synchronized inside the chip through a common system clock, and the power of each channel is less than 165 mW. Up to 16 levels of frequency, phase and amplitude modulation (FSK, PSK, ASK) can be achieved. The modulation level can be controlled by applying data to the configuration pin. In addition, it can also work in linear frequency sweep, phase sweep or amplitude sweep mode. When applied to radar and measuring instruments, it can also effectively correct the imbalance of external signal channels caused by analog processing (such as filtering, amplification) or PCB wiring mismatch.

The device integrates 4 high-speed 10-bit DACs with outstanding broadband and narrowband SFDR characteristics. Each channel has a 32-bit frequency control word, a 14-bit phase control word, and a 10-bit output amplitude control word. It is widely used in local oscillator sources, phased array radar/sonar systems, measuring instruments/meters, synchronous clocks, and RF signal sources. Its features are as follows:

(1) Four DDS channels with 10-bit DACs and a maximum sampling rate of 500 MSPS;

(2) Each channel has independent frequency/phase/amplitude control functions;

(3) Channel isolation greater than 65 dB;

(4) Linear frequency/phase/amplitude scanning function;

(5) Frequency/phase/amplitude modulation up to 16 levels;

(6) DAC can both scale current and be independently programmed;

(7) 0.116 Hz or better frequency adjustment resolution;

(8) 32-bit frequency resolution;

(9) 14-bit phase offset resolution;

(10) 10-bit output amplitude scalable resolution;

(11) Serial I/O port (SPI) with enhanced data throughput;

(12) The power saving mode can be controlled by software/hardware to reduce power consumption;

(13) Dual power supply (DDS core 1.8 V, serial I/O 3.3 V);

(14) Built-in multi-device synchronization function;

(15) Built-in clock frequency multiplication phase-locked loop (4 to 20 times frequency multiplication);

(16) The reference clock source can be selected.

2 System Software Design

2.1 Programming Process

The system mainly uses the P1 and P2 I/O ports of the C8051F020 microcontroller with SPI bus. The connection diagram between them and AD9959 is shown in Figure 2.

In the main function of the microcontroller programming, the watchdog must be turned off first, otherwise every time a breakpoint is reached, the program will jump to the entry point and execute from the beginning. Then initialize the microcontroller clock (using an external high-precision, high-stability crystal oscillator 22.118 4 MHz) and I/O port configuration, and then initialize the AD9959 through the I/O port, select the channel, write the corresponding control word, send the I/O_UPDATE signal, and output the required signal. The program flow chart of the microcontroller is shown in Figure 3.

2.2 Single frequency signal generation

This system needs to generate 12 MHz and 48 MHz sine wave signals. According to the calculation formula of output frequency: f=(FTW·fs)/232, the value of frequency control word FTW can be calculated as FTW=(fo·232)/fs. When fs=500 MHz, the frequency control word corresponding to the output frequency of 12 MHz is: FTW=0624DD2F; the frequency control word corresponding to 48 MHz is: FTW=189374BC. Then you only need to write the control word to the CTW0 register of AD9995. The following is the specific operation process:

(1) AD9959 is initialized so that its internal registers are in the initial state, that is, the working mode is single-frequency mode, the frequency control word and phase control word are both set to 0, and single-bit serial data transmission.

(2) Set the system reference frequency to 100 MHz and the frequency multiplier to PLL=5.

(3) Set the enable bit of channel 0 to 1 and the enable bits of other channels to 0.

(4) Use the serial I/O port to send the frequency control word 0624DD2F required by channel 0 to the I/O Buffer.

(5) The enable bit of channel 1 is set to 1, and the enable bits of other channels are set to 0.

(6) Use the serial I/O port to send the frequency control word 189374BC required by channel 1 to the I/O Buffer.

(7) Send the I/O_UPDATE signal to transfer the data in the I/O Buffer to the internal register (Active Register).

The waveform of the output signal can be seen in Figures 4 and 5 in the Test Results and Analysis.

2.3 Linear frequency modulation signal generation

AD9959 does not have a function mode to directly generate linear frequency modulation, but it can achieve this function through indirect methods. Its principle is the same as that of AD9854, which can generate linear frequency modulation. It changes the frequency sweep step control word (RDW/FDW) and the frequency sweep dwell time control word (RSRR/FSRR) during the linear frequency sweep process. Therefore, only by constantly changing RDW/FDW and RSRR/FSRR according to actual needs during the AD9959 frequency sweep process can a linear frequency modulation signal be obtained.

There is one more thing to explain about the realization of the linear frequency modulation working state. Since the linear frequency modulation signal has a time width limit, an external timer is required to control the time width when outputting the linear frequency modulation signal.

The specific operation is: first configure the linear sweep mode to the non-dwelling linear sweep mode, then specify the starting frequency, ending frequency, rising sweep step control word (RDW) and rising sweep dwell time control word (RSRR), and finally use the microcontroller's timer to accurately control the P2 pin to accurately control the linear frequency modulation signal.

This system needs to generate a linear frequency modulation signal with a bandwidth of 30 MHz. Here, the center frequency is set to 50 MHz, so the starting frequency is set to 35 MHz, the ending frequency is set to 65 MHz, the rising sweep step frequency is set to 1 kHz, and the rising sweep dwell time is set to the minimum value of 8 ns. Then, an I/O_UPDATE signal is sent to the system to import the value to be written to the register into the DDS core.

When P2 changes from low level to high level (with I/O_UPDATE function), AD9959 starts to sweep from the starting frequency to the ending frequency. Every 8 ns, the chip automatically sends the value of RDW to the frequency accumulator (not the phase accumulator) to linearly change the output frequency value. When the ending frequency is reached, the DDS chip automatically returns to the starting frequency. The total time of this process is 240μs (that is, the time width is 240μs). After the timer accurately times 240μs, P2 is reversed and the cycle changes, so that a linear frequency modulation signal can be generated periodically. Its actual output waveform is shown in Figure 6.

3 Test Results and Analysis

After experimental debugging, the single-frequency 12 MHz and 48 MHz signals and the linear frequency modulation signal with a bandwidth of 30 MHz were finally output. The following is the test result picture.

Figure 4 shows the 12 MHz signal output waveform. It can be seen that the waveform distortion is small, and the measured output frequency is 11.9986 MHz, which is very close to 12 MHz. The fluctuation range is 11.914 MHz to 12.073 MHz, and the output frequency is stable.

Figure 5 shows the 48 MHz signal output waveform. It can be seen that the waveform distortion is small, and the measured output frequency is 48.017 21 MHz, which is not much different from the required output frequency, and the output frequency is stable.

Figure 6 shows the output waveform of a linear frequency modulation signal with a bandwidth of 30 MHz. It can be seen that the waveform amplitude of the output signal is stable, the phase is continuous, and the distortion is small.

4 Conclusion

As a mature technology, DDS has been widely used. Based on the DDS chip AD9959, this system realizes the output of sine wave signals at any frequency point in the 2 kHz to 200 MHz frequency band and the output of linear frequency modulation signals with a bandwidth of 30 MHz. AD9959 has 4 output channels, and the average isolation between channels reaches 74.2 dBm, which has good isolation. Its output signal has good stability after being analyzed by oscilloscope and spectrum analyzer, high frequency and phase resolution, and low phase noise. It can meet the requirements of passive radar signal sources and other equipment signal sources, and has good application value.