Principle and Design of 4-Channel Class D Audio Amplifier

Principle and Design of 4-Channel Class D Audio Amplifier

In a multi-channel design, driving each channel independently consumes more power, more components, and takes up more board space. The result is a more complex thermal design, lower sound quality and reliability at a higher cost.

Therefore, to minimize power consumption and simplify the associated thermal management of high-performance multi-channel audio systems, design engineers have been looking to high-efficiency Class D audio amplifiers that can provide more than 90% efficiency over a wide range of output power levels. In contrast, traditional Class AB amplifiers for this market are only about 50% efficient, and the efficiency drops rapidly as the output power level decreases. Similarly, engineers are also constantly studying the performance of integrated ICs to reduce component count and board area.

Whether in the automotive entertainment or home theater system markets, consumers continue to demand more channels and speakers, with each channel being able to handle higher audio power levels. In addition to higher wattage, audiophiles continue to demand improved sound quality, reduced distortion and noise, and superior isolation between channels.

4-channel driver

In response to this demand, International Rectifier (IR) has combined advanced DirectFET power MOSFETs with innovative integrated audio drivers to develop a 4-channel Class D audio amplifier design that is comparable to single-channel solutions. To achieve this goal, the circuit uses an integrated audio driver, the IRS2093M, which integrates four channels of high-voltage power MOSFET drivers on the same chip. In addition, this 200V device includes an on-chip error amplifier designed specifically for Class D audio amplifier applications in a half-bridge topology, an analog PWM modulator, a programmable preset dead time, and reliable protection functions (Figure 1). In addition to preventing shoot-through current and current surges in the power MOSFET, the programmable preset dead time also enables scalable power designs in terms of power and channel count. These protection functions include overcurrent protection (OCP) and undervoltage lockout (UVLO) protection with automatic reset control.

Figure 1: In addition to integrating four channels of high-voltage power MOSFETS drivers on the same chip, this 200V device also features an on-chip error amplifier, analog PWM modulator, programmable preset dead time, and advanced protection features.

To achieve best-in-class isolation between different channels, the audio driver deploys proven high-voltage junction isolation technology and floating gate drivers using Gen 5 HVIC process. This enables excellent internal signal isolation on the die, which allows the circuit to process more channels of signals simultaneously, keeping the basic noise of each channel at a very low level while minimizing crosstalk between channels.

Next, we built a 4-channel half-bridge Class D audio amplifier circuit as shown in Figure 2, which combines an integrated Class D audio controller and gate driver IRS2093M with eight IRF6665 DirectFET power MOSFETs and several passive components. Each channel of this multi-channel audio amplifier is designed to provide 120W of output power. For ease of use, the circuit includes all the necessary internal management power supplies.

Figure 2: This 4-channel half-bridge Class D audio amplifier design uses an integrated Class D audio controller and IRS2093M gate driver, along with eight IRF6665 DirectFET MOSFETs and some passive components.

To achieve the best overall performance, the IRF6665 power MOSFET is optimized specifically for Class D amplifier designs. In addition to providing low on-state resistance, the power MOSFET is also improved to obtain minimum gate charge, minimum body diode reverse recovery, and minimum internal gate resistance. In addition, the DirectFET package provides lower parasitic inductance and resistance compared to traditional wire-bonded packages. In short, the optimized IRF6665 MOSFET provides high efficiency and low total harmonic distortion (THD) and electromagnetic interference (EMI).

Features and Functionality

To provide the highest performance and reliable design in a smaller space, this 4-channel Class-D audio amplifier solution uses self-oscillating PWM modulation. Since this topology is equivalent to an analog second-order sigma-delta modulation, and the Class-D switching stage is in the loop, errors in the audible frequency range are transferred to inaudible frequencies according to its operating characteristics, thereby reducing noise. At the same time, sigma-delta modulation allows designers to perform sufficient error correction to further reduce noise and distortion.

As shown in Figure 2, the self-oscillating topology combines the front-end integrator, PWM comparator, level shifter, gate driver, and output low-pass filter (LPF). Although this design can switch at higher frequencies, it still uses 400kHz as the optimal switching frequency for a few reasons. First, at lower frequencies, the efficiency of the MOSFET improves, but the inductor ripple current increases, and the leakage of the output PWM switching carrier also increases. Second, at higher frequencies, switching losses reduce efficiency, but there is an opportunity to achieve wider bandwidth. When the inductor ripple current decreases, the iron loss will increase.

Since the direction of the load current changes with the audio input signal in a Class D audio amplifier, an overcurrent condition may occur in a positive current cycle or a negative current cycle. Therefore, in order to protect both the high-side and low-side MOSFETs from overcurrent in both directions, a programmable overcurrent protection (OCP) is used to provide bidirectional protection, and the RDS(on) of the output MOSFET is used as a current sensing resistor. In this design, when the measured current exceeds the preset critical value, the OCP logic outputs a signal to the protection circuit, forcing the HO and LO pins to be at a low level, thereby protecting the MOSFET from damage.

Due to the structural limitations of high-voltage ICs, the current sensing implementations for high-side and low-side MOSFETs are not the same. For example, low-side current sensing is based on the VDS across the low-side MOSFET when the device is in the on-state. To prevent transient overshoot from triggering OCP, a blanking interval is added after LO is turned on to stop overcurrent detection for 450ns.

The threshold voltage of low-side overcurrent sensing is set by the OCSET pin, ranging from 0.5V to 5.0V. If the VDS measured for the low-side MOSFET exceeds the voltage corresponding to COM of the OCSET pin, the driver circuit will execute the OCP protection procedure. To set the overcurrent shutdown level, the voltage of the OCSET pin can be calculated using the following formula:

To minimize the impact of input bias current on the OCSET pin, we choose the resistor values ​​R4 and R5 so that the current flowing through the voltage divider is 0.5mA or more. At the same time, inputting VREF to OCSET through a resistor divider improves immunity to fluctuations in the supply voltage Vcc.

Similarly, for positive load currents, the high-side overcurrent sensing also monitors the load condition, this time based on the VDS measured across the MOSFET during the high-side turn-on period via the CSH and Vs pins. When the load current exceeds the preset turn-off level, the OCP protection stops the switching operation. To prevent transient overshoots from triggering the OCP, a blanking interval can be added after the HO is turned on to stop the overcurrent detection for 450ns.

Unlike low-side current sensing, the threshold of the CSH pin is internally fixed at 1.2V. However, a higher threshold can be set using external resistor dividers R2 and R3. In either case, an external blocking diode D1 is used to block the high voltage from flowing to the CSH pin in the event of a high-side disconnect. Based on the 0.6V forward voltage drop across D1, the minimum threshold for high-side overcurrent protection is 0.6V.

In short, the critical value VCSH of the CSH pin can be calculated using the following formula:

Where ID is the drain current and VF(D1) is the forward voltage drop of D1. In addition, the reverse blocking diode D1 is forward biased via a 10kΩ resistor R1.

To prevent shoot-through or overshoot currents through the two MOSFETs, a blocking period called dead time is inserted between high-side turn-off and low-side turn-on, or between low-side turn-off and high-side turn-on. The integrated driver allows the designer to select the appropriate dead time from a range of preset values ​​to optimize performance based on the size of the selected MOSFET. In fact, only two external resistors are required to set the dead time through the DT pin of the IRS2093. This eliminates the need for external gate timing adjustment and also prevents extraneous noise introduced by adjusting the switch timing, which is very important for ensuring audio performance.

When determining the optimal dead time, the user must consider the MOSFET's fall time. This is because for practical applications, the actual effective dead time will be different from that provided in the data sheet due to the switch's fall time tf. This means that to determine the effective dead time, the MOSFET gate voltage fall time must be subtracted from the dead time value in the data sheet.

Similarly, for UVLO protection, the driver monitors the status of voltages VAA and VCC before normal operation begins to ensure that both voltages are above their respective thresholds. If VAA or VCC is below the UVLO threshold, the protection logic of the IRS2093 turns off LO and HO. As a result, the power MOSFET will stop operating until VAA and VCC exceed their UVLO thresholds.

In addition, to achieve the best sound quality, the 4-channel audio circuit board design minimizes the line impedance and mutual coupling between the analog and switching sections, and ensures that the analog signals are separated from the switching stage and power supply ground.

Measured performance

We measured the efficiency, total harmonic distortion plus noise (THD+N), and EMI performance of each channel with a sinusoidal signal frequency of 1kHz, 1Vrms, and a 4Ω load impedance. In addition, we measured the 4-channel Class D audio amplifier design shown in Figure 2, showing its best-in-class isolation and crosstalk performance. The supply voltage of the relevant circuit board is ±35V, and the self-oscillation frequency is 400kHz.

As shown in Figure 3, the efficiency of each channel is about 90% at 4Ω load and power output from less than 50W to 120W. The main factors contributing to the high channel efficiency include the DirectFET MOSFET IRF6665, which produces low on-state and switching losses. At the same time, the design has no cross conduction because the integrated driver provides a safe dead time.

Figure 3: With a 4Ω load, power output is increased from less than 50W output to 120W, and the measured efficiency curve shows approximately 90% efficiency per channel.

This high power efficiency enables this 4-channel design to handle one-eighth of the continuous rated power, which is the normal operating environment required for general safety, without the use of any additional heat sinks or forced air cooling.

Likewise, testing for distortion shows that THD+N performance is consistent across a wide range of output powers for each channel. As shown in Figure 4, THD+N is less than 0.01% below 50W per channel and increases as output power increases. For example, at approximately 100W per channel, distortion rises to 0.02%. This performance remains consistent across the entire audio range of 20Hz to 20kHz, even as output power increases from 10W to 50W per channel (into a 4Ω load). As shown in Figure 5, the noise floor for each channel remains below -80dBv across the entire audio range. Noise is measured with no input signal and a self-oscillating frequency of 400kHz.

Figure 4: Below 50W per channel, total harmonic distortion plus noise (THD+N) is less than 0.01% and begins to increase as output power increases.

Similar testing for channel isolation showed that crosstalk between channels 1 and 3, and channels 1 and 4, was better than -70dB across the entire audio range at 60W output power per channel.

At the same time, the design provides a good power supply rejection ratio (PSRR) of -68dB at a 1kHz signal frequency. The high PSRR comes from the driver's self-oscillation frequency. This allows the 4-channel Class-D amplifier to provide excellent performance even when using an unregulated power supply.

Figure 5: With no input signal, the noise floor of each channel remains below -80dBv across the entire audio range.

Conclusion

The 4-channel Class D audio amplifier solution using the IRS2093M integrated driver has efficiency, THD+N and EMI performance comparable to single-channel designs. In addition, the base noise is maintained below -80dBv throughout the audible range. At the same time, excellent isolation between channels keeps intermodulation distortion (IMD) at a minimum level to provide ideal sound performance. As high efficiency eliminates the need for a heat sink, the integrated audio driver successfully achieves a 4-channel Class D audio amplifier solution with a footprint reduced by half.