Hardware implementation of audio system
The audio driver in this design is implemented using the Unified Audio model, based on the Intel Xscale PXA272 processor and TI's TSC2101 audio chip, and uses an audio system architecture based on the I2S (Inter-IC Sound) bus. The system schematic is shown in Figure 1. The Intel Xscale PXA272 chip integrates an I2S controller and processes audio data through the I2S bus. Other signals (such as control signals) need to be transmitted separately. In this design, the SSP serial port of the Xscale PXA272 chip is configured as an SPI serial port to achieve the transmission of control signals.
Figure 1 System Schematic Diagram
I2S is a serial digital audio bus protocol proposed by Philips. The I2S controller of PXA272 controls the I2S link. The I2S controller consists of data buffer, status and control registers, and counters. They connect the system memory and the peripheral audio decoder chip (TSC2101) to generate synchronous audio. When playing audio files, the I2S controller sends the digitized sound samples in the system memory to the peripheral TSC2101 audio decoder chip through the I2SLINK connection, and then the digital-to-analog converter of the TSC2101 chip converts the digital audio signal into an analog signal.
For recording, the I2S controller receives digital signals from the external TSC2101 audio chip and stores them in the system memory. I2S provides both normal I2S and MSB-justified-I2S formats. The I2S controller of the TSC2101 chip and the PXA272 is connected via 5 pins to form a channel for audio data transmission. The necessary signals of the I2S controller are: a bit rate clock, which can reference an external or internal clock source; a control signal that provides "left/right" channel control information; two serial audio pins, one output and one input; bit rate clock, the I2S controller will also send the optional system clock signal to the external decoder.
The I2S controller is accessed through DMA mode. In DMA mode, the DMA controller can only access the FIFO through the serial audio data register (SADR). The DMA controller usually accesses the FIFO queue data in blocks of 8, 16 or 32 bytes.
The audio chip TSC2101 used in this design integrates stereo audio decoding and touch screen control chips. The stereo DAC can play audio files at a sampling rate of up to 48Kb/s, and is specially designed for PDAs, PMPs, smart phones and MP3 players. TSC2101 integrates speaker amplifiers, headphone amplifiers and four-wire touch screen controllers with audio codecs, and has a stereo headset transceiver interface, a mobile phone transceiver interface, a mono 8Ω speaker amplifier and a 32Ω receiver driver, and integrates a battery monitor and an on-chip temperature sensor.
The circuit design of the TSC2101 chip is shown in Figure 2.
Figure 2 TSC2101 chip circuit design
This design is the application of TSC2101 in smart phones. CP-IN is the voice input of the communication module, and CP-OUT is the output of the audio system to the communication module. In actual applications, MIC1 can be connected to CP-OUT through the internal PGA (programmable gain amplifier) and AGC (automatic gain control) circuits of TSC2101 to realize the microphone function of smart phones; at the same time, MIC1 input can also sample the voice data through the internal ADC and transmit it to the processor storage space via the I2S bus to realize the recording function. Of course, while the smart phone is talking, the call recording function can also be realized. Pins 38 to 41 in the circuit diagram are SPI interfaces, pins 42 to 46 are I2S control pins, pins 9 to 12 are touch screen inputs, pins 27 and 28 are audio outputs that can be connected to headphones, pin 26 is connected to the mobile phone receiver, and pins 33 and 35 are connected to external speakers.
Using the Unified Audio model to implement audio driver
The implementation methods of audio drivers include MDD-PDD layered mode and non-layered Unified Audio model. MDD-PDD is a method to directly implement the stream interface, using the model device driver provided by Microsoft
Previous article:Common installation methods for speakers in audio engineering
Next article:ARM Cortex-M Audio Performance Analysis
Recommended ReadingLatest update time:2024-11-17 03:35
- Popular Resources
- Popular amplifiers
- Network Operating System (Edited by Li Zhixi)
- Virtualization Technology Practice Guide - High-efficiency and low-cost solutions for small and medium-sized enterprises (Wang Chunhai)
- Arduino Uno Windows Driver
- Practical Development of Automotive FlexRay Bus System (Written by Wu Baoxin, Guo Yonghong, Cao Yi, Zhao Dongyang, etc.)
- High signal-to-noise ratio MEMS microphone drives artificial intelligence interaction
- Advantages of using a differential-to-single-ended RF amplifier in a transmit signal chain design
- ON Semiconductor CEO Appears at Munich Electronica Show and Launches Treo Platform
- ON Semiconductor Launches Industry-Leading Analog and Mixed-Signal Platform
- Analog Devices ADAQ7767-1 μModule DAQ Solution for Rapid Development of Precision Data Acquisition Systems Now Available at Mouser
- Domestic high-precision, high-speed ADC chips are on the rise
- Microcontrollers that combine Hi-Fi, intelligence and USB multi-channel features – ushering in a new era of digital audio
- Using capacitive PGA, Naxin Micro launches high-precision multi-channel 24/16-bit Δ-Σ ADC
- Fully Differential Amplifier Provides High Voltage, Low Noise Signals for Precision Data Acquisition Signal Chain
- Innolux's intelligent steer-by-wire solution makes cars smarter and safer
- 8051 MCU - Parity Check
- How to efficiently balance the sensitivity of tactile sensing interfaces
- What should I do if the servo motor shakes? What causes the servo motor to shake quickly?
- 【Brushless Motor】Analysis of three-phase BLDC motor and sharing of two popular development boards
- Midea Industrial Technology's subsidiaries Clou Electronics and Hekang New Energy jointly appeared at the Munich Battery Energy Storage Exhibition and Solar Energy Exhibition
- Guoxin Sichen | Application of ferroelectric memory PB85RS2MC in power battery management, with a capacity of 2M
- Analysis of common faults of frequency converter
- In a head-on competition with Qualcomm, what kind of cockpit products has Intel come up with?
- Dalian Rongke's all-vanadium liquid flow battery energy storage equipment industrialization project has entered the sprint stage before production
- Allegro MicroSystems Introduces Advanced Magnetic and Inductive Position Sensing Solutions at Electronica 2024
- Car key in the left hand, liveness detection radar in the right hand, UWB is imperative for cars!
- After a decade of rapid development, domestic CIS has entered the market
- Aegis Dagger Battery + Thor EM-i Super Hybrid, Geely New Energy has thrown out two "king bombs"
- A brief discussion on functional safety - fault, error, and failure
- In the smart car 2.0 cycle, these core industry chains are facing major opportunities!
- Rambus Launches Industry's First HBM 4 Controller IP: What Are the Technical Details Behind It?
- The United States and Japan are developing new batteries. CATL faces challenges? How should China's new energy battery industry respond?
- Murata launches high-precision 6-axis inertial sensor for automobiles
- Ford patents pre-charge alarm to help save costs and respond to emergencies
- Where does the chip's power come from?
- EEWORLD University Hall ---- Zhou Gong Series Lectures —— CAXA Electronic Chart Example
- Live broadcast with prizes: Registration for AC/DC in ATX and Server power supply solutions and applications has started!
- [2022 Digi-Key Innovation Design Competition] Internet clock based on NTP service on ESP32
- 8266 WiFi module obtains time and weather information through the network
- uLisp microcomputer
- How many chips are needed to connect three network ports to the DM9000c chip?
- Download Nexperia's 5G infrastructure applications and win prizes!
- J1772 Electric Vehicle Service Equipment (EVSE) with Wi-Fi Monitoring
- Liyuan invites you to win big prizes for a good start in the new year