\"Automotive FlexRay Bus System Development Practice\" first introduces the relationship between the FlexRay bus and the automotive network, and summarizes the various protocol specifications contained in the FlexRay bus standard; then focuses on the three protocol specifications that need to be paid attention to in development practice - FlexRay electrical physical layer specification, FlexRay protocol specification and FlexRay physical layer electromagnetic compatibility test specification; then introduces the commonly used development tools and core chips in the development of automotive FlexRay bus systems; finally, taking a specific project as an example, it introduces how to determine the development plan, how to plan the network structure and parameters, how to carry out project software and hardware development, and how to conduct joint debugging and testing of the project. The automotive FlexRay bus is a high-speed, deterministic, fault-tolerant bus standard for automobiles. The FlexRay in-vehicle network standard has become the standard for similar products and will guide the development direction of the entire automotive electronic product control structure for many years to come. \"Automotive FlexRay Bus System Development Practice\" comprehensively and systematically introduces the automotive FlexRay bus protocol, mainstream development tools, system software and hardware design, and introduces the design method of the automotive FlexRay bus system through examples. It can be used as a reference for teachers and students of vehicle engineering, electronic information engineering, electrical engineering, automatic control and other majors in ordinary colleges and universities, as well as related technical personnel to learn and develop the application of FlexRay technology. It can also be used as a reference for researchers and developers of automotive electronic systems, especially in-vehicle network systems. Previous FlexRay Protocol Chapter 0 Introduction: FlexRay and Automotive Networks 0.1 The Development of Automotive Network Technology 0.2 Classification of Automotive Networks 0.3 A New Member of Automotive Networks - FlexRay 4 0.3.1 The Origin and Development of FlexRay 0.3.2 Basic Principles and Features of FlexRay 0.4 Overview of FlexRay Protocol 0.4.1 FlexRay Requirements Specification 0.4.2 FlexRay Protocol Specification 0.4.3 FlexRay Electrical Physical Layer Specification 0.4.4 FlexRay Electrical Physical Layer Application Notes 0.4.5 FlexRay Data Link Layer Conformance Test Specification 0.4.6 FlexRay Electrical Physical Layer Conformance Test Specification 0.4.7 FlexRay Physical Layer Electromagnetic Compatibility Test Specification 0.4.8 FlexRay Physical Layer Common Mode Choke Electromagnetic Compatibility Evaluation Specification 0.4.9 Primary Central Bus Monitor Specification 0.4.10 Primary Node Bus Monitor Specification 0.5 Terms and Definitions 0.6 Commonly used abbreviations Chapter 1 FlexRay electrical physical layer specifications 1.1 Communication channel basics 1.1.1 Propagation delay 1.1.2 Asymmetric delay 1.1.3 Truncation 1.1.4 Characteristic symbol length change 1.1.5 Collision 1.1.6 Wake-up mode 1.2 FlexRay network basic principles 1.3 FlexRay network basic components 1.3.1 Cable 1.3.2 Connector 1.3.3 Cable termination 1.3.4 Common mode choke 1.3.5 Bus DC load 1.4 Network topology 1.4.1 Point-to-point connection 1.4.2 Passive star topology 1.4.3 Linear passive bus topology 1.4.4 Active star topology 1.4.5 Cascaded active star topology 1.4.6 Hybrid topology 1.4.7 Dual channel topology 1.5 Electrical signal 1.5.1 Bus state: Idle_LP and Idle 1.5.2 Bus States: Data_1 and Data_0 1.6 Signal Integrity 1.6.1 Transmitter Eye Diagram 1.6.2 Receiver Eye Diagram 1.7 Bus Driver 1.7.1 Operating Modes 1.7.2 Operating Mode Transitions 1.7.3 Bus Driver Interface 1.7.4 Bus Driver Behavior Under Fault Conditions 1.8 System Timing Constraints 1.8.1 Decoding Process Requirements 1.8.2 FlexRay Topology Requirements 1.8.3 Signal Chain Example 1.8.4 Asymmetric Delay 1.8.5 Communication Controller Requirements Chapter 2 FlexRay Protocol Specification 2.1 Introduction to FlexRay Protocol Specification 2.1.1 Application Scope 2.1.2 SDL Rules 2.2 Protocol Operation Control 2.2.1 Principle 2.2.2 Description 2.2.3 Protocol Operation Control Process 2.3 Encoding and Decoding 2.3.1 Principle 2.3.2 Description 2.3.3 Encoding and Decoding Process 2.3.4 2.4 Frame Format 2.4.1 Overview 2.4.2 FlexRay Frame Header (5 Bytes) 2.4.3 FlexRay Payload Data Segment (0 to 254 Bytes) 2.4.4 FlexRay Frame Trailer 2.5 Media Access Control 2.5.1 Principle 2.5.2 Description 2.5.3 Media Access Control Process 2.6 Wake-up and Startup 2.6.1 Cluster Wake-up 2.6.2 Communication Startup and Reintegration 2.7 Clock Synchronization 2.7.1 Introduction 2.7.2 Time Representation 2.7.3 Synchronization Process 2.7.4 Clock Startup 2.7.5 Time Measurement 2.7.6 Correction Value Calculation 2.7.7 Clock Correction 2.7.8 Configuration of Distributed Clock Synchronization 2.8 Controller Host Interface 2.8.1 Principle 2.8.2 Interface Chapter 3 FlexRay Physical Layer Electromagnetic Compatibility Test Specification 3.1 RF and transient interference test3.1.1 RF and transient interference test3.1.2 RF interference emission test3.1.3 RF interference test3.1.4 Transient interference test3.2 Electrostatic discharge interference test3.2.1 Test overview3.2.2 Test configuration3.2.3 Test composition3.2.4 Test steps and parametersPart 2 FlexRay development practiceChapter 4 Development background4.1 Preparation before development - understand the current development level of the industry4.2 Typical development process4.3 Semiconductor chip4.3.1 Freescale4.3.2 NXP4.3.3 Fujitsu4.3.4 Infineon4.3.5 austriamicrosystems4.4 Auxiliary development tools4.4.1 Evaluation kit4.4.2 Development board4.5 Simulation and test tools4.5.1 DaVinci Network Designer FlexRay4.5.2 CANoe.FlexRay 4.5.3 FRstress 4.5.4 MultiLog 4.6 Measurement tools Chapter 5 System definition and verification 5.1 Determine the project plan 5.2 Overall planning and network design (network design tool DaVinci Network Designer FlexRay) 5.2.1 Define the network (define global parameters) 5.2.2 Define the node (define node parameters) 5.2.3 Define the signal 5.2.4 Define the data frame and the relationship between sending and receiving 5.2.5 Define the correspondence between data frames and signals 5.2.6 Define the communication schedule 5.2.7 Vector\'s network design tool DaVinci Network Designer FlexRay 5.3 Network simulation verification (simulation verification tool CANoe.FlexRay) 5.3.1 Overview 5.3.2 Introduction to CANoe.FlexRay software function modules 5.3.3 Model establishment and simulation Chapter 6 ECU node hardware development 6.1 Classification of hardware devices 6.2 PCI based on MFR4310 chip FlexRay communication board design 6.2.1 Board function definition 6.2.2 MFR4310 structure and function description 6.2.3 Circuit system design 6.3 Independent bus FlexRay communication board design based on MC9S12XF512 microcontroller 6.3.1 Board function definition 6.3.2 MC9S12XF512 structure description 6.3.3 MC9S12XF512 function description 6.3.4 Circuit principle 6.4 Transceiver chip TJA1080ATS/2 6.4.1 Structure description 6.4.2 Feature description 6.4.3 Operation mode Chapter 7 ECU node software development 7.1 Freescale chip driver programming 7.1.1 Memory Mapping and Register Description7.1.2 Functional Description7.1.3 Chip Initialization7.2 Freescale\'s FlexRay Unified Driver7.2.1 Overview7.2.2 Application Examples7.2.3 Project Structure of Application Examples7.3 FlexRay Driver Development under Windows7.3.1 Establishing a Driver Development Environment7.3.2 Building a Basic Framework for a WDM Driver7.3.3 Hardware Resource Access Class Description7.3.4 Implementation of the Main Driver Modules7.3.5 Driver Calling7.4 FlexRay Driver Development under VxWorks7.4.1 Embedded Real-Time Operating System VxWorks7.4.2 Preparations before Developing a Driver7.4.3 Defining FlexRay Driver Header Files7.4.4 VxWorks Operating System DriverChapter 8 Project Debugging and Testing8.1 Node Function Verification8.1.1 Overview8.1.2 Verification Process8.2 System Integration Test8.2.1 Overview8.2.2 Test Process References
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