Design of A/D and ARM interface of ultrasonic thickness measurement system using FIFO

In high-frequency ultrasonic data acquisition systems, many high-speed A/D converters often cannot be directly connected to the processor. In this case, FIFO is needed to build a bridge between the processor and the A/D converter. The first-in, first-out feature of FIFO can easily cache a large number of data blocks. In the ARM-based ultrasonic thickness measurement system, a high-frequency ultrasonic probe of more than 1 MHz is used. The frequency of the measured data after A/D conversion does not match the data receiving capability of the ARM processor. Therefore, a FIFO needs to be connected between the A/D and ARM processing to solve the above problem. This design uses AD's A/D chip AD9283 and Cyperss's CY7C4261 for FIFO. The maximum sampling frequency of both is 100 MHz. ARM uses Samsung's S3C2410 processor. All three have strong external interface capabilities, which are convenient for seamless connection. The hardware interface circuit is simple and easy to debug.

1 Chip Selection
1.1 S3C2410 Processor
The S3C2410 processor is a 32-bit microcontroller based on the ARM920T processor core of ARM Corporation and manufactured using a 0.18μm process. The processor has: independent 16 KB instruction cache and 16 KB data cache, MMU, LCD controller supporting TFT, NAND flash controller, 3-way UART, 4-way DMA, 4-way Timer with PWM, I/O port, RTC, 8-way 10-bit ADC, Touch Screen interface, I2C-BUS interface, IIS-BUS interface, 2 USB hosts, 1 USB device, SD host and MMC interface, 2-way SPI. The S3C2410 is a 16/32-bit RISC architecture processor that uses the powerful instruction set of the ARM920T CPU core. The processor can run at up to 203 MHz.
1.2 AD9283 High-Speed ​​Analog-to-Digital Converter
In ultrasonic nondestructive testing systems, the frequency of ultrasonic probes is generally 2 to 10 MHz. The probe frequency is 5 MHz. According to the sampling theorem, the sampling frequency is preferably 5 to 8 times the probe frequency. Therefore, the A/D chip uses AD9283 from AD Company, which has a maximum sampling rate of 100 MHz and can meet the system requirements.
1.3 FIFO memory CY7C4261
FIFO memory is a bridge between A/D and ARM. Its parameter indicators directly affect the data acquisition speed. First, the read/write speed of the FIFO memory should be fast enough. For the convenience of debugging, it is best to be consistent with the maximum speed of the A/D device; secondly, the storage capacity of the FIFO memory should be appropriate. If the capacity is too large, it will cause resource waste. If the capacity is too small, it will cause overflow or the data acquisition speed will be too slow.
The thickness of the object under test is usually 10 mm. When the signal length is the first 8 peaks and the entire system works at the limit frequency of 100 MHz, the following calculation is made:
Number of sampling times = sampling rate × time
= sampling rate × (2 × thickness × 8 / ultrasonic speed)
= 100 × 2 × 0.01 × 8 / 5 900
= 2 712 times
That is, nearly 3 KB of cache is required. The ultrasonic thickness measurement system needs to measure objects with a maximum thickness of 50 mm, so a FIFO with a capacity of 15 K × 8 B is required. Therefore, the depth of the FIFO must be greater than 15 KB; the width must be greater than the number of bits of A/D, that is, greater than 8 bits; the maximum operating rate is 100 MHz, which is consistent with the A/D sampling rate. This design uses CY's FIFO memory CY7C4261, which has a maximum sampling rate of 100 MHz, the same as the maximum sampling rate of AD9283; the capacity is 16 KB × 9 B, which can meet the data volume requirements.

2 Interface Design
AD9283 is an 8-bit analog/digital converter, CY7C4261 is a 9-bit FIFO, and the data bus of S3C2410 is 32 bits. CY7C4261 only needs to connect to the lower 8 bits DO~D7 of S3C2410. Due to the first-in first-out structure of FIFO, no address line is required in the system, which greatly simplifies the circuit. The data sampled by A/D must be sent to FIFO in real time. The write clock frequency of the two must be the same, and the minimum clock input of AD9283 and CY7C4261 is 10 ns, which is unified and convenient to operate. 74ALS08 is a four-two input AND gate. TOUTl (GPBl) and TOUT2 (GPB2) in the pulse width modulation wave output port of ARM are configured as general output ports to control the on and off of 74ALS08, thereby controlling the write clock of A/D and FIFO. The CLKOUTO of S3C2410 is connected to the RCLK of CY7C4261 to provide the read clock for FIFO. The full flag of CY7C4261 is connected to the external interrupt EINT1 of S3C2410 to trigger the external interrupt. The nRSTOUT1 of S3C2410 is connected to the CY7C4261 to reset the FIFO. The interface block diagram is shown in Figure 1.

3 Timing Design
The write clocks of A/D and FIFO are controlled by two AND gates. Because it takes 4 clock cycles for AD9283 to start analog input and the data of the conversion appears on the output port, and the delay effect of the wire will be very obvious when sampling at high speed, if the clocks of A/D and FIFO are connected together, it is likely that too much invalid data will be sampled. After separate control, the clocks of A/D and FIFO can be easily controlled by software delay. It is quite convenient to debug, and try to reduce the number of bits of invalid data to a minimum. The working timing of AD9283 is shown in Figure 2, and the write timing diagram of CY7C4621 is shown in Figure 3. [page]

When sampling. TOUT1 and TOUT2 are enabled by the program and output as 1. At this time, the sampling clock pulse is ANDed with TOUT1 and TOUT2 and then sent to the clock input ENCODE of AD9283 and the write clock input WCLK of CY7C4621 respectively. At this time, A/D starts to work and sends the converted data to its own output ports D0~D7. When the write enable is low and WEN2 is high, the data on the A/D output port is written into FIFO in sequence on the rising edge of WCLK. Each time a pulse comes from A/D and FIFO, an analog/digital conversion is completed and the data is stored in FIFO in sequence. The maximum data storage capacity of CY7C4261 is 16 KB. After completing 16 KB conversions, CY7C4261 will no longer be able to store new data. At this time, the memory full flag outputs a low level (outputs a high level when not full). Connect this signal to the external interrupt EINT1 of S3C2410, and use its change from high to low to generate an interrupt to indicate that a set of data collection is completed.
In the interrupt, ARM first quickly turns off the sampling pulse signal (making the output of TOUT1 and TOUT2 0), stopping the operation of A/D and FIFO. The ARM external clock signal CLKOUTO is connected to the read input RCLK of FIFO. Every time ARM performs an I/O read operation, cLKOUT0 sends a pulse to RCLK. Set FIFO read enable and WEN2 to low, and perform 16K I/O read operations continuously. The data is sent from CY7C4261 to the S3C2410 system in turn, and the entire data collection work is completed. Before each data collection, reset CY7C4261, configure nRSTOUTl of S3C24-10 as a general output port, input a low pulse of not less than 10 ns to the RS pin of CY7C4261, that is, output a low pulse at the nRSTOUTl pin of ARM. This can more fully ensure the stability of the read and write pointers of FIFO.

4 Data collection process The
data collection process of the ultrasonic thickness measurement system mainly includes ARM initialization, input excitation pulse, enable external interrupt, clock input to A/D, FIFO, and wait for interrupt. Stop A/D and FIFO, ARM reads data, and resets FIFO. The flow chart is shown in Figure 4.

5 Conclusion
Through the actual design in the ARM-based ultrasonic nondestructive testing system, the use of FIFO can make the high-speed A/D and ARM processor seamlessly connected, solving the mismatch problem between the two. Through software settings, the operation timing of A/D, FIFO and ARM can be flexibly adjusted, and the debugging is simple, ensuring the safety and reliability of data acquisition. The interface circuit is simple, flexible and efficient, and has high application value.