What is the purpose of these three assignment statements?

QWE4562009

What is the purpose of these three assignment statements? [Copy link]

 

What is the purpose of these three assignment statements?

maychang

The second sentence of Leo Tolstoy’s novel Anna Karenina is “Every unhappy family is unhappy in its own way.”

What is the purpose of Tolstoy's words?

dcexpert

The OP has had a lot of problems recently, probably because he has not mastered the correct learning method.

Looking at the code, it should be a software I2C program.

QWE4562009

maychang published on 2020-7-26 20:35 The second sentence of Leo Tolstoy’s novel Anna Karenina is “Every unhappy family has its own misfortune”...

NB

lcofjp

The purpose is to achieve a specific function.

QWE4562009

dcexpert posted on 2020-7-26 20:59 The OP has had a lot of problems recently. Maybe he didn't master the correct learning method. The code should be a software I2C program.

It is the code of IIC

QWE4562009

lcofjp posted on 2020-7-27 16:43 The purpose is to achieve specific functions.

Moderator. You can't reply like that. You are a moderator and you can't reply unprofessionally.

QWE4562009

maychang published on 2020-7-26 20:35 The second sentence of Leo Tolstoy’s novel Anna Karenina is “Every unhappy family has its own misfortune”...

maychang is a master. Haha! I just don't know why the loop in the response signal is so hard to understand.

huo_hu

The first statement before the first figure is right shift, and then assign the CY bit to sda. Sda should be defined as a bit variable before. The definition of CY is in the header file. It is a bit of a special function register, and it becomes the sign bit after shifting.

In the second figure, sda is placed in the lowest bit after right shift. Since sda is a bit variable and cannot be directly operated on |, it is first assigned to j.

I also don't understand the third picture. The only case where the uchar type i will judge i<255 as false is i=255.... I don't understand what it is doing.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don’t know why the loop in this response signal is so difficult to understand

There is a type of microcontroller external devices that use the IIC bus. Typical devices include 24C02 and so on. Below is the pin diagram of the 24CXX chip.

This type of chip has two pins, labeled SCL and SDA. They are also named SCL and SDA in the program.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don’t know why the loop in this response signal is so difficult to understand

These chips are serial memories. Since they are memories, there must be write operations and read operations, and you must tell the memory chip which address you want to write or read data from. There are two types of write operations: writing a single byte and writing a page. There are two types of read operations: reading a byte at the current address and reading multiple bytes sequentially. In addition, there are "start" and "end" operations.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don't know why the loop in this response signal is so hard to understand.

This figure shows the "start" and "end" waveforms. Note that SDA falls when SCL is high, which is a "start", and SDA rises when SCL is low, which is an "end".

Corrected at 17:22.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don’t know why the loop in this response signal is so difficult to understand

The following figure shows the timing for writing one byte.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don’t know why the loop in this response signal is so difficult to understand

The following figure shows the timing of sequential read from the current address.

maychang

QWE4562009 posted on 2020-7-27 18:24 maychang is a master. Haha! What I mean is that I don’t know why the loop in this response signal is so difficult to understand

It can be seen that the operations of reading and writing addresses and data are quite complicated. Without understanding the timing required by the chip, it is impossible to understand the operations of reading, writing, starting and ending the chip. These operations are actually for reading and writing data in the chip.

So, lcofjp said it right on the 5th floor: "The purpose is to achieve a specific function."

QWE4562009

huo_hu posted on 2020-7-28 02:04 The first statement in the first figure is right shift, and then assign CY bit to sda. Sda should be defined as a bit variable before. The definition of CY is in the header file, ...

What does it mean that the sign bit is after shifting?

After right shift, put sda in the lowest position. What is the data like at this time? 0000 0001?

maychang

QWE4562009 posted on 2020-7-28 15:01 What does it mean that the sign bit is after the shift? After right shift, put sda in the lowest bit----------What is the data at this time? 0000 0001?

"What does it mean that the sign bit is after the shift?"

The 7th bit is moved to the 6th bit, the 6th bit is moved to the 5th bit... the 0th bit is moved to the CY bit (i.e. the sign bit).

maychang

QWE4562009 posted on 2020-7-28 15:01 What does it mean that the sign bit is after the shift? After right shift, put sda in the lowest bit----------What is the data at this time? 0000 0001?

"After shifting right, put sda in the lowest position"

Not yet. After the right shift, bit 0 is moved to bit CY, so the value of bit CY needs to be assigned to sda.

maychang

QWE4562009 posted on 2020-7-28 15:01 What does it mean that the sign bit is after the shift? After right shift, put sda in the lowest bit----------What is the data at this time? 0000 0001?

"What does a piece of data look like at this moment? 0000 0001?"

We don't know the other bits of the byte received by the external device on the IIC bus. We only know that the bit to be sent is equal to the value in CY.

QWE4562009

maychang posted on 2020-7-28 12:41 This figure shows the "start" and "end" waveforms. Note that SDA rises when SCL is high, which is "opening...

Am I remembering this wrong? When SCL is high, SDA falls to signal the start signal. . . .