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The reason for using assembly is very simple, that is, the efficiency of assembly code. When the machine starts, the efficiency of assembly is used to initialize the hardware and provide conditions for loading the kernel.
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There are currently two commonly used ARM assembly instructions:
*ARM standard assembly: applicable to ARM's assembler, suitable for use on the Windows platform.
*GNU Assembly: Uses the assembler in the GNU cross-compilation tool chain, suitable for Linux platform development.
3. Assembler framework: Note that the operating environment below is Redhat 6.4 + eclipse C/C++ +CDT plug-in.
The basic framework of the assembly code
Where assembly is used, startup code, and where efficiency is required.
Above is a skeleton of the startup code.
Let’s build the framework:
start.S:
.text
.global _start
_start:
mov r2,#2
mov r3,#3
Makefile:
all: start.o
arm-linux-ld -Tgboot.lds -o start.elf $^
%.o : %.S
arm-linux-gcc -g -o $@ $^ -c
clean:
rm *.o *.elf
The structure of a simple project operation:
Linker script:
Gboot.lds:
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS {
. = 0x50008000;
. = ALIGN(4);
.text :
{
start.o (.text)
*(.text)
}
. = ALIGN(4);
.data :
{
*(.data)
}
. = ALIGN(4);
bss_start = .;
.bss :
{
*(.bss)
}
bss_end = .;
}
The result of running:
Next is the operation implementation of the assembly code:
mov r1,#6
mov r2,r1
mov r3,#10
@mvn: pass the inverted value
mvn r0,#4 @r0:4 is negated to -5
mvn r1,#0b111000
mvn r2,r1 @r2:0b111000
Sub Example:
Example of Add:
Of course, we can also specify parameter values when executing: as shown below, we specify r0=44, r2=66.
After running:
Examples of And;
Bic example: The third number is the source code. If the source code bit is 1, the corresponding bit is cleared to 0. If the source code bit is 0, the corresponding bit remains unchanged.
From the above execution results, we can see that the highest bit of r1 and the lowest two bits of 1 correspond to the value of the source code bit, so they are cleared to 0, and the middle four bits, corresponding to the four 0s of the source code, remain unchanged 1010. So the final output is 0b101000.
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Comparison Instructions
Operation of the Cmp instruction: The result of the comparison will not be kept, but will affect the corresponding bit of cpsr: N or Z bit.
We can see that r1-1=1 is a positive number, the highest four bits of cpsr 2=0010, and the N and Z bits are both 0.
Here r1-3=-1, the highest four bits of cpsr 8=1000, that is, the N bit is set to 1, indicating that the result is a negative number.
Here r1-2=0, and the second highest bit of cpsr is set to 1, indicating that the two numbers are equal.
The operation of the Txt instruction: test bit, bitwise AND, the result is 0, the Z bit is set to 1, the result is not 0, the Z bit is 0
The value after bitwise AND is not 0, so the Z bit of cpsr will not be set to 1.
The result after bitwise AND is 0, so the Z bit of cpsr is set to 1. The value of the upper four bits of the result is 4.
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Jump instruction:
B instruction:
In the above example, gt means jump when greater than. 6>5 so it jumps to label branch1. Add r3, r1, r2 will not be executed.
In the above example, the jump condition is not met, the execution is done sequentially, and no jump occurs. However, the execution is done sequentially, so a b end is added to jump to the end and perform no operation.
Bl: Jump with link:
Lr:
Disassembled code:
From the above, we can see that lr saves the next address after bl returns, and assigns it to the pc pointer for jumping.
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Shift instructions:
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Lsl left shift instruction:
11 shifted left two places: 1100
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ror Circular right shift:
Circular right shift, the lowest bit 1 is circularly moved to the highest bit.
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Program status word access instruction.
In GNU assembly, we do not allow the above instructions to operate and access our program word status register instructions, so we need to move their values out, then operate, access, modify, etc., and then move them back in. So we designed two instructions: MSR and MRS instructions. Move out mrs and move back msr.
After executing:
at last:
We have to change the value in cpsr through the above operations.
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Memory access instructions:
The above are instructions in the core, and memory is accessed through storage instructions.
Ldr instruction: save memory to register
Str instruction: save register to memory.
We set r1 to the address of the development board's memory, as shown above. Next, create a monitoring address in memory:
Next, let's take a look at the changes after running the above instructions: As shown in the figure below, our 0xff has been saved to 0x50008000.
Here is ldr:
The value of R2 is the value stored in r0 and has been taken out.
The engineering code for this assembly operation:
.text
.global _start
_start:
@ldr and str operations
mov r0,#0xff
str r0,[r1]
ldr r2,[r1]
@Program status word register access
mrs r0,cpsr
orr r0,#0b100
msr cpsr,r0
@ror: Circular right shift
mov r1,#0b11
mov r1,r1,ror#1
@lsl: Move left
mov r1,#0b11
mov r1,r1,lsl#2
@bl command: jump with link
bl func1
@b directive:
mov r1,#6
mov r2,#7
cmp r1,r2
bgt branch1@gt means jump when greater than
add r3,r1,r2
b end
func1:
mov r1,#23
mov pc,lr@function return, fixed format.
branch1:
sub r3,r1,r2
end:
nop
@tst directive:
mov r1,#0b101
tst r1,#0b01
mov r1,#0b101
tst r1,#0b10
Operation of the @cmp directive:
mov r1,#2
cmp r1,#1
mov r1,#2
cmp r1,#3
mov r1,#2
cmp r1,#2
@bic: bit clear instruction
mov r1,#0b1101011
bic r2,r1,#0b1000011
@and usage: logical and
mov r1,#5
and r2,r1,#0
mov r1,#5
and r2,r1,#1
@add: Addition:
add r1,r0,r2
@sub: Subtraction, note that the minuend cannot be an immediate number
mov r2,#4
sub r0,r2,#2
mov r1,#3
sub r3,r1,r0
@This is a comment, mov instruction
mov r1,#6
mov r2,r1
mov r3,#10
@mvn: pass the inverted value
mvn r0,#4 @r0:4 is negated to -5
mvn r1,#0b111000
mvn r2,r1 @r2:0b111000
Previous article:3. Arm machine code
Next article:1. Brief explanation of ARM registers
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