Interrupts and exceptions

1 Ways to detect event occurrence: polling and interruption

2 S3C2440 abnormal interrupt system block diagram

An interrupt is a type of exception.

Switching between different modes of ARM processor:

a. In the privileged level (non-user mode) operating mode, the operating mode can be switched by modifying the mode control bit of the program status register CPSR.

b. Switch the operation mode through the exception handling process.

Note that in user mode, the processor mode cannot be switched directly. It is necessary to generate exception handling and switch the processor operating mode during the exception handling process.

3 ARM Registers

Unbacked registers: shared between modes.

Backup register: exclusive to a certain mode.

Understanding the value of the program counter PC:

PC points to the instruction address at the read level, not the instruction address at the execution level. Depending on the depth of the pipeline, the offset of PC relative to the current instruction address is also different. The following takes the ARM architecture and 3-stage pipeline as an example:

The space occupied by ARM instructions is 4 bytes, so when executing the MOV instruction,

PC value = current execution level instruction address + 8

4 Exception Vector Table

Each time the CPU executes an instruction, it will detect whether an exception interrupt occurs. When an exception occurs during program execution, the program will jump to the corresponding exception vector address and perform exception handling operations. The exception vector address is related to the chip design, and this jump process is enforced by the CPU; however, exception handling is implemented by the user through code. A jump instruction can be placed at the address defined by the vector table to implement user-defined exception handling functions.

5 Abnormal interrupt response process

6 Abnormal interruption processing flow

7 Description of related registers of S3C2440 interrupt controller

8 printfException

9 und exception handling sample code

10 swi exception handling sample code

11 irq exception handling sample code