This article introduces the A/D conversion and signal input channel selection using the ARM core S3C2440 as the processor and the 24-bit ADS1256 chip with its own analog switch. It uses its characteristics and working principles to design a high-precision, multi-channel, and real-time operability Strong seismic data acquisition system circuit. The data is input through a bridge-type low-pass filter, which effectively suppresses the common-mode signal of the long wire and greatly improves the anti-electromagnetic interference capability of the entire circuit, thereby enabling high-precision, high-quality, low-power consumption, and portability of the seismic data acquisition system. Features.
Overall system structure block diagram
The overall structure of the circuit is shown in Figure 1. The ARM9 series S2C2440 microprocessor produced by Samsung is used as the core control chip. The weak and complex seismic signal output by the geophone is first processed by the analog signal conditioning circuit for amplification, following and filtering. Finally, the channel is selected by controlling the analog switch, and then ADS1256 is used for analog/digital conversion. The collected data is sent to the mass memory through the SPI bus for later review and analysis.
Analog signal conditioning circuit
Analog signal conditioning circuits mainly include filtering and amplification of weak earthquake signals. The seismic signal first passes through the input circuit composed of bridge low-pass filtering, and then passes through the preamplifier circuit.
The input circuit mainly functions as an RC impedance matching network, suppressing common-mode signals in long wire transmission, blocking high-frequency signals, and improving anti-interference capabilities. In addition, it also suppresses incoming interference waves that hinder effective wave recording. The circuit The principle is shown in Figure 2.
The preamplifier circuit mainly consists of two stages. The two stages are connected by direct coupling. The first stage amplifies the double-terminal input seismic signal, then outputs it in a single stage, and then passes through the second stage differential linear amplifier to convert the output mode to A /D conversion provides a double-ended input differential signal and further eliminates the common-mode signal of the input circuit. The circuit principle is shown in Figure 3. In order to ensure that the input terminal remains balanced, the resistance values of the two input terminals of the first stage to ground should be equal. In order to reduce the common-mode voltage amplification factor, R7=R8 and R9=R10 are generally used.
Analog/digital conversion circuit
The crystal oscillator must be close to the ADS1256 when wiring the PCB board. In order to ensure the oscillation and obtain a stable frequency, an external ceramic capacitor of less than 0.1μF must be connected. This system takes 18 pF.
Peripheral interface circuit
Its main interface circuit includes touch display circuit, storage circuit and host computer communication circuit, etc. It is basically similar to the interface circuit on the development board. Here is only a simple text description. The circuit mainly uses extended FLASH and SDRAM for system startup and loading of running programs. FLASH is used to save the user's program code, and SDRAM is used to store data and a small amount of data when the program is running. The display part adopts a flat-panel structure liquid crystal display device, which has the excellent characteristics of large amount of displayed information, low voltage, low power consumption, long life, no radiation, and no pollution. It occupies an important position in the display field. Indirect access is generally used to realize the circuit connection between the controller chip and the LCD module. The data of the LCD module usually needs to be input in parallel. Here, a serial-to-parallel device is required to perform serial/parallel conversion to provide parallel input for the LCD. The module's read, write, chip select, reset and other control signals are controlled by the general-purpose I/O pins of S3C2440. Choose high-speed USB bus transmission technology to communicate with the host computer. This implementation must be completed together with the S3C2440 and the dedicated USB communication driver chip and peripheral circuits. In order to facilitate the hardware debugging of the USB interface, an RS 232 interface must be added.
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