Introduction to the transplantation of μC/OS-II on Cortex-M3 series microcontrollers

introduction

　　μC/OSII is a simple and efficient real-time embedded operating system with open source code. It has good scalability and portability and is widely used in various embedded processors. It is useful for improving product quality and reducing development cycle. It is of great significance to reduce costs. This article uses μC/OSII as the transplantation object and the ARM CortexM3 core microprocessor as the transplantation target to discuss its transplantation process and application.

1 Introduction to μC/OSII and ARM CortexM3

　　The real-time operating system μC/OSII is a priority-based preemptive real-time kernel. The program has strong readability, good portability, fixed code, can be cut, and is very flexible. To date, μC/OSII has been running on more than 40 microprocessors of different architectures, from 8-bit to 64-bit. The main features of μC/OSII are: it is a real-time multi-tasking operating system with deprivable priority; it can process and schedule 56 user tasks, and the priority of tasks can be dynamically adjusted; it provides inter-task communication, semaphores, mailboxes and Message queue; has good scalability and can minimize the ROM and RAM size of the system.

　　ARM is currently the most widely used RISC microprocessor structure in the embedded field. It occupies a leading position in the field of embedded system applications with its advantages of low cost, low power consumption, and high performance. The current ARM series of processors include ARM7, ARM9, ARM9E, ARM10, ARM 11 and other products. The CortexM3 core is a high-performance processor core launched by ARM in 2006. It is a microcontroller version of ARM's new V7 instruction set structure series and can be used in enterprise applications, automotive systems, home networks and wireless technology. Its main features are:

　　① Low power consumption;
　　② The core has a small number of gates and has excellent cost performance;
　　③ Short interrupt delay;
　　④ Low debugging cost;
　　⑤ It has a nested vectored interrupt controller (NVIC), which is closely integrated with the processor core to achieve low latency Interrupt processing;
　　⑥ It has a reducible memory protection unit (MPU) for memory protection.

2 Transplant μC/OSII

　　Luminary Micro's LM3S series microcontrollers include an ARM CortexM3 MCU core running at 50 MHz frequency, embedded Flash and SRAM, a low-dropout voltage regulator, integrated brownout reset and power-on reset functions, and analog comparison , 10-bit ADC, SSI, GPIO, watchdog and general-purpose timers, UART, I2C, motion control PWM and quadrature encoder inputs, ideal for building and home automation, factory automation and control, industrial control power supplies Applications in equipment, stepper motors, brushed and brushless DC motors, AC induction motors, etc.

　　This transplantation is completed in the following environment: the compilation tool uses IAR FOR ARM, and the target board uses the LM3S8962 microcontroller EasyARM8962 development board of Zhou Ligong Company. The host connects to the target board through LMLINK JTAG to establish a cross-development and debugging environment.

During the transplantation process, the core source code of μC/OSII does not need to be modified and can be placed directly in the μC/OSII Source folder. The μC/OSII\Ports directory stores the μC/OSII transplantation code based on the LM3S microcontroller, including three necessary files: OS_CPU_C.C, OS_CPU_A.ASM, and OS_CPU.H. The Startup.S file in the Target directory is the startup code and interrupt vector table of the microcontroller. Target.C and Target.H provide the microcontroller initialization function TargetTInit() and other simple peripheral control API functions. The hierarchical structure is shown in Figure 1.

　　Porting μC/OSII to the ARM processor requires modifying three files related to the ARM architecture: OS_CPU.H, OS_CPU_A.ASM, OS_CPU_C.C. The following describes the transplantation work of these three files respectively.

figure 1

(1) OS_CPU.H file

　　Contains constants, macros and custom types required by μC/OSII.

　　① Data type defined by OS_CPU.H. In this migration, μC/OSII redefined the data types as follows:

　　typedefunsigned charBOOLEAN;
　　typedefunsigned charINT8U;
　　typedefsigned charINT8S;
　　typedefunsigned shorTINT16U;
　　typedefsignedshorTINT16S;
　　typedefunsigned inTINT32U;
　　typedefsignedintINT32S;
　　typedeffloatFP32;
　　typedefdoubleFP64;
　　typedefunsigned intOS_STK;
　　typedefunsigned intOS_CPU_SR;

　　② Modify content related to ARM processor. The stack growth direction of different processors is different. The stack of ARM CortexM3 grows from high address to low address. OS_STK_GROWTH is set to 1.
The program is as follows:

　　#defineOS_STK_GROWTH1

(2) OS_CPU_C.C file

　　Among the C functions defined by OS_CPU_C.C, the OSTaskStkInit() function is related to the CPU, so the transplanted code needs to modify this function. The program is as follows (this function is called when initializing the task to initialize the stack used by the task):

　　OS_STK * OSTaskStkInit(void (*task)(void *p_arg),void *p_arg,OS_STK *ptos,INT16U opt) {
　　OS_STK *stk;
　　(void)opt;//Prevent compilation warnings
　　stk=ptos;//Load the top of the stack Pointer, that is, the last address of the stack array simulates the stack situation when an interrupt occurs
　　*(stk)=(INT32U)0x01000000L;//xPSR
　　*(stk) =(INT32U)task;//PC, task entry
　　*(stk) =(INT32U )0xFFFFFFFEL;//R14(LR)
　　*(stk) =(INT32U)0x12121212L;//R12
　　*(stk) =(INT32U)0x03030303L;//R3
　　*(stk) =(INT32U)0x02020202L;//R2
　　*( stk) =(INT32U)0x01010101L;//R1
　　*(stk) =(INT32U)p_arg;//R0, input parameter p_arg to simulate the task process, save other registers to the stack
　　*(stk) =(INT32U)0x11111111L;//R11
　　*(stk) =(INT32U)0x10101010L;//R10
　　*(stk) =(INT32U)0x09090909L;//R9
　　*(stk) =(INT32U)0x08080808L;//R8
　　*(stk) =(INT32U)0x07070707L;/ /R7
　　*(stk) =(INT32U)0x06060606L;//R6
　　*(stk) =(INT32U)0x05050505L;//R5
　　*(stk) =(INT32U)0x04040404L;//R4
　　return(stk);
}

(3) OS_CPU_A.ASM statement

　　The transplantation of μC/OSII requires writing 5 simple assembly language functions.

　　① OS_ENTER _CRITICAL( ): Turn off the interrupt source.
　　② OS_EXIT_CRITICAL( ): Reopen the interrupt source.
　　③ OSStartHighRdy(): Run the task with the highest current priority.
　　④ OSCtxSw(): Called when a task gives up the right to use the CPU.
　　⑤ OSIntCtxSw(): Called in the exit interrupt service function OSIntExit() to implement interrupt-level task switching.

　　Because the LM3S microcontroller currently only supports the high 3 bits of the 8-bit interrupt priority level, shifting 1 to the left by 5 bits here is 00100000B, and its macro is defined as OS_CRITICAL_INT_PRIOEQU(1<<5).

　　ARM CortexM3 uses the OSPendSV() function to quickly perform context switching. The C language expression program of OSPendSV() is as follows:

OSPendSV: Turn off interrupt;
　　if(PSP !=NULL) {
　　　　Save R4~R11 to task stack SP_process;
　　　　OSTCBCur>OSTCBStkPtr = SP_process;
　　}
　　OSTaskSwHook( );
　　OSPrioCur = OSPrioHighRdy;
　　OSTCBCur = OSTCBHighRdy;
　　PSP = OSTCBHighRdy>OSTCBStkPtr;
　　from new task stack Mid-recovery R4~R11;
　　recovery interruption;
　　abnormal return;

　　After completing the above work, just write three files in the Target directory according to the actual situation of the target board, and μC/OSII can run on the LM3S8962 microcontroller.

3 Practical applications

　　After the transplantation work was completed, a program was written that can perform CAN communication, control LED lights with buttons, and connect to the host through the RS232 serial port to realize operations such as reading and writing the SD card. The following is part of the code of the program:

staticOS_STKTask_CardStk[TASK_CARD_STK_SIZE]; /*Card operation task stack*/
staticOS_STKGstkStart[TASK_START_STK_SIZE];/*Start task stack*/
static OS_STKGstkLed[TASK_LED_STK_SIZE];/*LED task stack*/
static OS_STKGstkKey[TASK_KEY_STK_SI ZE];/*key task Stack*/
static OS_STKGstkCan[TASK_CAN_STK_SIZE];/*Stack of CAN communication tasks*/
OS_EVENT *Uart0ReviceMbox;/*Serial port receiving data mailbox*/
OS_EVENT *DispSem;/*Key semaphore*/
OS_EVENT *DispSem1;/*CAN receiving signal*/

　　Define the task priority in Main.H as:

#defineTASK_START_PRIO0
#defineTASK_CARD_PRIO1
#defineTASK_LED_PRIO2
#defineTASK_KEY_PRIO3
#defineTASK_CAN_PRIO4

　　The task code for creating the task is:

static void taskStart (void*parg) {
　　(void)parg;
　　DispSem = OSSemCreate(1);
　　DispSem1 = OSSemCreate(0);
　　targetInit();/*Initialize the target microcontroller*/
　　#if OS_TASK_STAT_EN > 0
　　OSStatInit();/* Enable statistics function*/
　　#endif
　　/*Create other tasks here*/
　　OSTaskCreate (taskLed, (void *)0,&GstkLed[TASK_LED_STK_SIZE 1], TASK_LED_PRIO);/*Initialize taskLed task*/
　　OSTaskCreate (Task_Card,/*Create SD card operation task*/
　　　　(void *)0,
　　　　&Task_CardStk[TASK_CARD_STK_SIZE 1],
　　　　TASK_CARD_PRIO );
　　OSTaskCreate (taskKey, (void *)0,/*Create key operation task*/
　　　　&GstkKey[TASK_KEY_STK_SIZE 1],
　　　　TASK_KEY_PRIO);
　　OSTaskCreate ( taskCan, (void *)0,/*Create CAN operation task*/
　　　　&GstkCan[TASK_CAN_STK_SIZE 1],
　　　　TASK_CAN_PRIO);
　　while (1) {
　　　　OSTaskSuspend(OS_PRIO_SELF);/*Startup task can be suspended here*/
　　}
}
　　SDExample is It is convenient to observe the GUI interface for writing SD card operation tasks, select the serial port baud rate corresponding to the program, and connect the hardware. As can be seen from Figure 2, the SD card can be successfully operated.

figure 2

Conclusion

　　As an excellent real-time operating system, μC/OSII has been ported to microprocessors of various architectures. This design has been successfully transplanted on LM3S8962, and the correctness of the transplantation has been verified through an example. This transplant has only done some basic work. On this basis, further development can be carried out to make full use of the performance of the LM3S series microcontroller and the characteristics of μC/OSII to play a certain role in the field of detection and maintenance.