51 MCU timer TMOD and TCON, SCON

51 MCU interrupt level

Interrupt source Default interrupt level Sequence number (for C language)
INT0---External interrupt 0 Highest 0 
T0 ---Timer/Counter 0 interrupt 2nd 1
INT1---External interrupt 1 3rd 2
T1 ----Timer/Counter 1 interrupt 4th 3
TX/RX---Serial port interrupt 5th 4
T2 ---Timer/Counter 2 interrupt Lowest 5
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The timer/counter mode control register TMOD is an 8-bit register defined bit by bit, but can only use byte addressing, and its byte address is 89H.

D0~D3 are the settings for T0 timer/counter, and D4~D7 are the settings for T1 timer/counter.

GATE: It is the gate bit. When GATE=0, as long as TRO or TR1 in TCON is set to 1 when writing the program, the timer/counter can be started.

When GATE=1, not only TRO or TR1 in TCON must be 1 when writing the program, but the external pin must also be at a high level in order for it to work.

C/T: Timing/counting mode switching, when C/T=0 it is timing mode, when C/T=1 it is counting mode.

M1, M0: used to select the working mode of the timer/counter. Generally, a 16-bit timer counter is used.

 TCON Timer Control Register

The timer control register is used to control the start and stop of the timer and mark the timer overflow and interrupt status.

TF1: TF1=1 indicates that an interrupt has occurred in T1. (Timer Flag, timer flag)

TR1: TR1=1 means T1 starts running. (T0 pin in the microcontroller needs high and low level drive)

TF0: TF0=1 indicates that an interrupt occurs at T0.

TR0: TR0=1 means T0 starts running. (T1 pin in the microcontroller needs high and low level drive)

IE1: IE1=1 indicates that an interrupt occurs in INT1.

IT1: IT1=1 means INT1 is falling edge triggered, IT1=0 means INT1 is low level triggered.

IE0: IE0=1 indicates that an interrupt occurs in INT0.

IT0: IT0=1 means INT0 is triggered by a falling edge (negative transition), and IT0=0 means INT0 is triggered by a low level.

External Interrupt:

IE0/IE1: External interrupt request flag

When a valid request signal appears on the INT0 (INT1) pin, this bit is automatically set to 1 by the microcontroller.

The CPU starts to respond and process the interrupt, and the microcontroller automatically sets it to 0 after entering the interrupt program.

IT0/IT1: External interrupt trigger mode control bit //Select valid signal

IT0/IT1=1: Pulse trigger mode, falling edge is valid.

IT0/IT1=0: Level trigger mode, low level is valid.
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Interrupt Enable Register IE (A8H)

EA: Overall interrupt enable bit; EA=1 enables interrupts.

ET2: T2 interrupt enable bit; ET2=1 enables interrupt (only for S52).

ES: Serial interrupt enable bit; ES=1 enables interrupt.

ET1: T1 interrupt enable bit; ET1=1 enables interrupt.

EX1: INT1 interrupt enable bit; EX1=1 enables interrupt.

ET0: T0 interrupt enable bit; ET0=1 enables interrupt.

EX0: INT0 interrupt enable bit; EX0=1 enables interrupt.

In the program, the timing value and the count value are determined by setting the values ​​of TH and TL in two 8-bit registers. The calculation process of TH and TL is as follows:

Assume that the time constant of the timer is X, and the number of bits of the timer is N.
The timing time T = (2 to the power of N - X) 12 / single-chip crystal frequency (for example, the oscillator frequency of 11.0592MHZ F = 1/11.0592)
N is the working mode of the timer (about the 4 working modes of the timer/counter, there will be a detailed introduction below):

In mode 0, N=13 (TH is 8 bits and TL is 5 bits)

In mode 1, N=16 (TH is 8 bits and TL is 8 bits)

In mode 2, N=8 (TH is 8 bits and TL is 0 bits)                                                                                                                               

In mode 3, N=8 (TH is 8 bits, TL is 8 bits, only applicable to T0, and T0 is divided into two independent 8-bit counters TH and TL)

According to the timing time and working mode, the time constant X is calculated through the formula: timing time T=(2 to the power of N-X)12/microcontroller crystal oscillator frequency. X is
converted into a binary number, the upper 8 bits are sent to TH1, and the lower 8 bits are sent to TL1, and the timer can be started to start timing.

Illustration of the three working modes of the timer:

Working mode 0:

Working method 1:

Working method 2:

Working method 3:

To summarize the timer operation steps are as follows:

1. Select the working mode (set the value of M0, M1) 

2. Select the control mode GATE (0 means that the software only needs to set the parameters, 1 means that the software needs to set the parameters, and the interrupt pin of the timer/counter needs to be high level)

3. Determine the working mode of the timer, whether it is timing mode or counting mode C/T.

4. Set the initial value of the timer (set THX and TLX)

5. Enable timer interrupt (set ET0 or ET1)

6. Enable total interruption (set EA value)

7. Timer/Counter Selection T0/T1 (Set the value of TR1 or TR0)

Example: Set an LED light to flash at a rate of 500ms

#include
 
sbit led = P1^0;
int i = 0;
 
void timer1_init()
{
    TMOD = 0x10; //Timer 0 selects working mode 1
    TH1 = 0x4C; //Set the initial value, timing 50ms
    TL1 = 0x00; 
    EA = 1; //Turn on the general interrupt
    ET1 = 1; //Turn on the timer 0 interrupt
    TR1 = 1; //Start timer 0
}
 
void main()
{
    led = 1;
    timer1_init();//Initialization of timer 1while
    (1)
    {
        if(i==10)
        {
          led = ~led;
          i = 0; //Note that i needs to be zero
        }
    }
}
 
void timer1() interrupt 3
{
    TH1 = 0x4C; //Set the initial value, timing 50ms
    TL1 = 0x00;
    i++;
}

¡ Timer operation steps:

Select the working mode (set

¡ Timer operation steps:

Select working mode (set M1, M0)

Select control method (set GATE)

Select timer or counter mode (set C/T)

Initialize the timer/counter (set THx and TLx

Enable timer interrupt (set ET0 or ET1

Enable total interruption (setting EA)

Turn on the counter (set TR1 or TR0)

M1, M0)

Select control method (set GATE)

Select timer or counter mode (set C/T)

Initialize the timer/counter (set THx and TLx

Enable timer interrupt (set ET0 or ET1)

Enable total interruption (setting EA)

Turn on the counter (set TR1 or TR0)

Timer operation steps 

Select working mode (set M1, M0)

Select control method (set GATE)

Select timer or counter mode (set C/ 

Assign initial value to the given timer/counter (set THx and TLx)

Enable timer interrupt (set ET0 or ET1

Enable total interruption (setting EA)

Turn on the counter (set TR1 or TR0)

It is composed of the lower 5 bits of TL0 (the upper 3 bits are not used) and the 8 bits of TH0. When the lower 5 bits of TL0 overflow, it carries to TH0. When TH0 overflows, the TF0 flag in TCON is set, and an interrupt request is issued to the CPU. It is composed of the lower 5 bits of TL0 (the upper 3 bits are not used) and the 8 bits of TH0. When the lower 5 bits of TL0 overflow, it carries to TH0. When TH0 overflows, the TF0 flag in TCON is set, and an interrupt request is issued to the CPU. It is composed of the lower 5 bits of TL0 (the upper 3 bits are not used) and the 8 bits of TH0. When the lower 5 bits of TL0 overflow, it carries to TH0. When TH0 overflows, the TF0 flag in TCON is set. 
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SCON Serial Port Control Register

SM0, SM1 working mode control bit

SM2: Multi-machine communication control bit, 1-allowed, 0-not allowed

REN: Serial receive enable bit. 1-allow, 0-not allow

TB8: The ninth bit of the transmitted data

RB8: Receive data ninth bit

TI: Transmit interrupt flag

RI: Receive interrupt flag

①SM0 and SM1: serial port working mode selection bits, two selection bits correspond to four communication modes, as shown in the figure below, where fosc is the oscillation frequency

SM2: Multi-machine communication control bit, mainly used for mode 2 and mode 3.

If SM2 = 1, multi-machine communication is allowed. The multi-machine communication protocol stipulates that if the 9th bit of data (D8) is 1, it means that the data frame is an address frame; if the 9th bit of data is 0, the data frame is a data frame. When an 89c51 (host) communicates with multiple 89c51 (slaves), the SM2 bits of all slaves are set to 1. The host first sends a frame of data as an address, that is, a certain slave number, in which the 9th bit is 1. After all slaves receive the data, they load the 9th bit of data into RB8. Each slave determines whether the slave receives the information of the host according to the value of the received 9th bit of data (in RB8). If (RB8) = 0, it means it is a data frame, then the receive interrupt flag RI = 0, and the information is lost. If RB8 = 1, it means it is an address frame, the data is loaded into SBUF and RI = 1 is set, interrupting all slaves, and the addressed target slave clears SM2 to receive a frame of data sent by the host, and other slaves still keep SM2 = 1.

If SM2 = 0, that is, it does not belong to the multi-machine communication situation, then after receiving a frame of data, no matter whether the 9th bit data is 0 or 1, RI = 1 is set, and the received data is loaded into SBUF. In mode 0, SM2 must be set to 0. In mode 1, if SM2 = 1, RI is set to 1 only when a valid stop bit is received, so as to receive the next frame of data.

REN: Enable reception control bit, set to 1 or cleared to 0 by software

When REN = 1, reception is allowed, which is equivalent to the switch of serial reception.

When REN = 0, reception is disabled

In the serial communication reception control process, if the conditions of RI = 0 and REN = 1 are met, reception is allowed.

TB8: The 9th bit (D8) of the transmitted data is loaded into TB8. In mode 2 or mode 3, it is set or reset by software according to the need to transmit data. It can be used as a parity bit in many communication protocols, and can also be used as a flag bit for sending address frames or data frames in multi-machine communication.

RB8: The 9th bit of received data, the principle is the same as TB8

TI: Transmit interrupt flag, which is set when a frame of data is sent. It is set by hardware when the serial transmission reaches the stop bit, and can be queried by software. It also requests an interrupt. Setting TI means providing the CPU with the information that "the transmit buffer SBUF is empty", and the CPU can prepare to send the next frame of data. After the serial port transmit interrupt is responded to, TI will not be automatically cleared to 0, and must be cleared to 0 by software.