PIC16F877A microcontroller (combined use of external interrupt and timer Timer0)

1 Implementation Principle

See the previous content of timer 0 and external interrupt

2 Implementation circuit diagram

3 Source code

/*----------------Function function:

  Application of Timer 0+External Interrupt

Function 1: LED0 keeps flashing;

Function 2: When no button is pressed, LED1 is off. When a button is pressed, LED1 is on.

--------------------------*/

#include// Call the header file of PIC16f87XA microcontroller

//#include"delay.h"//Call the delay sub-function

__CONFIG(0xFF32); //Chip configuration word, watchdog off, power-on delay on, power-off detection off, low voltage programming off

//__CONFIG(HS&WDTDIS&LVPDIS);

/*-----------Macro definition--------------*/

#define uint unsigned int

#define uchar unsigned char

uint i;

/*----------------Sub-function declaration------------------*/

/*----------------Main function--------------------*/

void main()

{

// The corresponding data direction register is TRISA. 

// Setting a TRISA bit (= 1) will make the corresponding PORTA an input. 

// Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output.

TRISB0=1; //Set RB0/INT port as input, press the button

TRISD0=0; //Set RD0 port to output, LED0

TRISD1=0; //Set RD1 port to output, LED1

// 1 = Port pin is > VIH, i.e. high level; 0 = Port pin is < VIL, i.e. low level

RD0=0; //Set data direction RD0 to output

RD1=0;

//RB0=0;

/******************Timer TMR0 initialization****************************/

// Timer mode is selected by clearing bit T0CS. Timer mode is selected by clearing bit T0CS (T0CS=0).

// In Timer mode, the Timer0 module will increment every instruction cycle (without prescaler).

// Counter mode is selected by setting bit T0CS. Counter mode is selected by setting T0CS bit (T0CS=1).

// In Counter mode, Timer0 will increment either on every rising or falling edge of pin RA4/T0CKI

// The incrementing edge is determined by the Timer0 Source Edge Select bit, (T0SE=1). 

// Clearing bit T0SE selects the rising edge. In counter mode, you need to select the rising edge (T0SE=0) or the falling edge (T0SE=1) trigger;

T0CS=0; //TMR0 clock source selection bit If T0CS=0, the clock source of TMR0 selects the internal instruction cycle (fosc/4)

// The following two lines of statements select the rising edge trigger in counter mode

//T0CS=0; //Counter mode

//T0SE=0; //Rising edge trigger 

// There is only one prescaler available which is mutually exclusively shared between 

// the Timer0 module and the Watchdog Timer.

// The PSA and PS2:PS0 bits determine the prescaler assignment and prescale ratio.

//Don't use prescaler

//PSA=1; //The prescaler is assigned to WDT (watchdog), that is, 1:1 frequency division. At this time, PS0~PS2 are invalid

//To prescale the frequency, the following four instructions replace the above one instruction

PSA=0; //Prescaler allocation bit

PS0=0; //Pre-scaling 1:8, the corresponding codes of the three bits are 010

PS1=1; // Eight system clocks, the value of the counter register +1

PS2=0;

//The TMR0 interrupt is generated when the TMR0 register overflows from FFh ​​to 00h.

// Timing 2000us=250us*8 (eighth frequency division), initial value TMR0=256-250=6

TMR0=0x06; //8-bit counter register initial value

// This overflow sets bit TMR0IF(T0IF). T0IF=1 indicates that the count register has overflowed.

T0IF=0; //The overflow interrupt flag of TMR0 is cleared, so that when the count register is full, T0IF generates a rising edge.

//The interrupt can be masked by clearing bit TMR0IE(T0IE).

//T0IE=1; //TMR0IE interrupt enable control bit 1

TMR0IE=1; //TMR0IE=T0IE is equivalent to the previous statement

/*********************External interrupt initialization********************/

// External interrupt on the RB0/INT pin is edge triggered,

// either rising if bit INTEDG (OPTION_REG<6>) is set or falling if the INTEDG bit is clear.

INTEDG=1; //Set RB0/INT to rising edge trigger

INTF=0; // Clear the interrupt flag of RB0/INT

// This interrupt can be disabled by clearing enable bit, INTE

INTE=1; // RB0/INT overflow interrupt flag enable bit 1

//****************Open global interrupt settings********************/

// A global interrupt enable bit, GIE (INTCON<7>), enables (if set) all unmasked interrupts

// or disables (if cleared) all interrupts

// External interrupt RB0/INT is set to enable interrupt, and global interrupt is required here

GIE=1; //General interrupt enabled

// External interrupt RB0/INT is set to interrupt enable, here we need to allow peripheral interrupts

PEIE=1; // Enable peripheral interrupts

while(1) // infinite loop, after the microcontroller is initialized, it will keep running this infinite loop

{

}

}

/********************Interrupt service routine**************************/

void interrupt ISR(void)//All interrupts of PIC microcontrollers have such an entry

{

// The TMR0 interrupt is generated(T0IF==1) when the TMR0 register overflows from FFh ​​to 00h.

// When the counter register changes from all 1 to all 0, T0IF==1.

if(T0IF==1) //need to further determine whether it is T0 interrupt    

{

//After the timer is interrupted, reset the initial value to prepare for the next interrupt

TMR0=0x13;

// Bit TMR0IF must be cleared in software by the Timer0 module Interrupt Service Routine

// before re-enabling this interrupt. Explains why it is cleared

// Overflow interrupt flag cleared. An interrupt will only occur when a rising edge appears on T0IF, so it must be cleared after the interrupt occurs.

T0IF=0;

//Execute the interrupt handler, that is, the interrupt occurs, what function do we want to execute

if(++i>250) //2ms interrupt once, then count 250 times to get 500ms

{

i=0;

RD0=!RD0; // Invert to achieve one second flashing

}

}

// When a valid edge appears on the RB0/INT pin, flag bit, INTF(INTCON<1>), is set.

else if(INTF==1) // Need to further determine whether the interrupt flag of RB0/INT is   

{

// The interrupt flag bit(s) must be cleared in software before 

// re-enabling interrupts to avoid recursive interrupts

// Clear the overflow interrupt flag. If a rising edge appears on INTF, an interrupt will be generated, so it must be cleared after the interrupt occurs.

INTF=0;

// Execute the interrupt handler to execute the function you want to execute when the interrupt occurs

RD1=1; // When an external interrupt occurs, the LED lights up

}

}