ATmega16 clock system and its distribution

Clock system and its distribution

Figure 11 shows the main clock system and its distribution of AVR. These clocks do not need to work at the same time. In order to reduce power consumption, different sleep modes can be used to disable the clocks of modules that do not need to work. For details, see P30 "Power Management and Sleep Mode". See Figure 11 for details of the clock system.

CPU Clock - clkCPU 
The CPU clock is connected to the subsystems that operate the AVR core, such as the general register file, status registers and data memory that holds the stack pointer. Stopping the CPU clock will stop the core from working and calculating.

I/O Clock - clkI/O 
The I/O clock is used for the main I/O modules, such as timer/counters, SPI and USART. The I/O clock is also used for the external interrupt module. It should be noted that some external interrupts are detected by asynchronous logic, so these interrupts can still be monitored even if the I/O clock is stopped. In addition, the start condition detection of the USI module is also implemented asynchronously without clkI/O, allowing this function to work properly in any sleep mode.

Flash Clock - clkFLASH 
The Flash clock controls the operation of the Flash interface. This clock is usually suspended or activated at the same time as the CPU clock.

Asynchronous Timer Clock - clkASY 
The asynchronous timer clock allows the asynchronous timer/counter and LCD controller to be driven directly by an external 32 kHz clock crystal. This allows the timer/counter to provide a real-time clock for the system even in sleep mode.

ADC clock - clkADC 
ADC has a dedicated clock. This allows the CPU and I/O clocks to be stopped when the ADC is working to reduce the noise
generated , thereby improving the ADC conversion accuracy.