RFID card reader circuit design based on Cortex-M0

RF chip SLRC610 (＄2.4466)

SLRC610(＄2.4466) is one of NXP's new generation of multi-protocol wireless near-field chips. It is a highly integrated transceiver chip for 13.56MHz contactless communication, supporting and complying with IS0/IEC15693, EPCUID and ISO/IEC18000-3 mode 3/EPC Class-1 HF protocol cards. It has three communication interfaces with the host: SPI, UART, and I2C bus (including I2C and I2CL modes). In addition, it is more secure than the previous generation and supports the connection of the secure access module (SAM).

Module hardware design

The module mainly consists of communication upgrade interface, debugging interface, prompt signal, LPC812 (＄0.6375), SLRC610 (＄2.4466), module built-in antenna, etc. The module block diagram is shown in Figure 1.

Main control chip circuit design

LPC812 (＄0.6375) is the highest configuration model in the LPC800 series. It has three packages: TSSOP16, SO2O, and TSSOP20 (＄9.9900). Because the design is a small module, the SO2O plastic small package is selected. Since LPC812 (＄0.6375) supports the allocation of special functions to a certain I/O pin through the switch matrix, when designing the schematic diagram, you can fully consider which pin to allocate a certain function to for convenient wiring and good performance. In addition, in this design, the built-in 1% precision 12 MHz internal RC oscillator of LPC812 (＄0.6375) is used as the system clock. The main control chip circuit is shown in Figure 2.

RF chip circuit design

SLRC610 (＄2.4466) has only one small HVQFN32 package. Pay special attention to its 33rd pin, which is the square surface of the chip facing the middle of the PCB surface. This surface must be well grounded, otherwise some strange phenomena will occur. SLRC610 (＄2.4466) supports four interfaces: SPI, I2C bus, I2CI and UART. It will judge the current host interface type through the combination of IFSEL0 and IFSEL1 levels after power-off reset. This design uses a hard-coded SPI interface. In the hardware circuit, IFSEL0 needs to be grounded and IFSEL1 needs to be connected to VCC. The RF chip circuit is shown in Figure 3. In addition, the function of the 33rd pin VSS in the SLRC610 (＄2.4466) chip is grounding and heat dissipation, so this pin must be well grounded.

The matching circuit of the antenna includes an EMC low-pass filter (L1, L2, C5, C6), a matching circuit (C3, C4, C7~C1O), a receiving circuit (R2, R3, C15) and the antenna itself. The component values ​​of the receiving circuit need to be specially designed and adjusted according to the actual situation of the board. The size of the design module is limited. The receiving circuit adopts a single-ended mode with fewer components, and the antenna coil is built into the middle layer of the PCB to facilitate application and reduce volume.

This module design uses newer main control and RF chips, which are low-priced, have strong performance, and will not have supply and price issues for a long time. The LPC800 series not only adds practical functions such as switch matrix to facilitate user circuit design, but also integrates the ISP upgrade function of the old generation of microcontrollers. This article describes in detail how to use these two chips and how to debug the module. The module uses surface-mounted components, which have the characteristics of low cost, low power consumption, small size, and long distance for reading and writing cards. It is very convenient to use and has high application value.