ARM11 learning based on S3C6410 (XVI) External interrupt

Publisher:恬淡如云Latest update time:2021-02-06 Source: eefocusKeywords:S3C6410  ARM11 Reading articles on mobile phones Scan QR code
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The interrupt process is as follows:


The interrupt source detects the interrupt signal and then sends it to the interrupt controller. The interrupt controller determines whether the interrupt is masked and decides whether to send the interrupt signal to the CPU. After the interrupt signal is sent to the CPU, the CPU processes the interrupt, that is, calls the interrupt function.


The above process is basically the interrupt processing process of the embedded system, but different embedded systems have different configurations in these three parts.


S3C6410 has a total of 64 interrupt sources.


The above picture shows the interrupt controller of S3C6410. Here we are concerned about the red box part. These two are interrupt controllers, each managing its own 32 interrupts.


Here, a part of the picture is captured. There are 64 interrupts in total, each interrupt has its own label, its own group, and which interrupt controller controls it. The label refers to which bit or register of the corresponding interrupt controller register corresponds to it. For example, INT_EINT0, this is external interrupt 0, belongs to VIC0, and the label is 0. This means that the 0th bit or the 0th register of the VIC0 register corresponds to the external interrupt 0 interrupt.






This chapter is about external interrupts. S3C6410 has 127 external interrupts, and its I0 pins and groups are as follows:


S3C6410 divides external interrupts into 10 groups. Each group has corresponding pins. For external interrupt group 0, 16 pins GPN0-GPN15 can be used.


In addition to the groups, interrupt numbers are assigned to the groups:



The 27 interrupts belonging to external interrupt group 0 occupy 4 interrupt numbers in VIC, namely external interrupts 0-3, external interrupts 4-11, external interrupts 12-19, and external interrupts 20-27. External interrupt groups 1-9 only occupy 1 interrupt number.


In order to save interrupts, it is impossible to assign an interrupt number to each external pin, so some external interrupts are combined into one interrupt number. For example, external interrupts 0-3 are combined into one interrupt number, INT_EINT0. When any of these four interrupts generates an interrupt, INT_EINT0 will be suspended, and the CPU will know that external interrupts 0-3 have been generated, and then execute interrupt processing. In the interrupt service program, in order to know which interrupt is generated, it is also necessary to query the register to know which interrupt is generated.


S3C6410 interrupt processing has vector mode and non-vector mode. Because it is compatible with the previous ARM series, the non-vector mode is preserved. The non-vector mode means that when an interrupt occurs, it jumps to the interrupt exception, and then writes a program in the interrupt exception to determine which interrupt occurred, and then executes the corresponding interrupt handler. However, in the non-vector mode, the entry address corresponding to each interrupt is set in advance, so that when an interrupt occurs, it does not need to jump to the interrupt exception, but directly jumps to the corresponding interrupt program. In this way, the efficiency of interrupt processing is improved.


In my design, the interrupt vector method is used. It is recommended to use the interrupt vector method.


Keywords:S3C6410  ARM11 Reference address:ARM11 learning based on S3C6410 (XVI) External interrupt

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