1. Pins and their functions
DAC0832 is a dual in-line 8-bit D/A converter. It can complete the conversion from digital input to analog (current) output. Figure 1-1 and Figure 1-2 are the pin diagram and internal structure diagram of DAC0832 respectively. Its main parameters are as follows: resolution is 8 bits, conversion time is 1μs, full-scale error is ±1LSB, reference voltage is (+10?/span>-10)V, power supply is (+5~+15)V, and logic level input is compatible with TTL. As can be seen from Figure 1-1, there are two levels of latches in DAC0832. The first level latch is called the input register, and its latching signal is ILE. The second level latch is called the DAC register, and its latching signal is also called the channel control signal /XFER.
In Figure 1-1, when ILE is high, the chip select signal /CS and the write signal /WR1 are low, the input register control signal is 1. In this case, the output of the input register changes with the input. After that, when /WR1 changes from low to high, the control signal becomes low. At this time, the data is latched into the input register, so that the output of the input register no longer changes with the change of the external data DB.
For the second-level latch, when the transmission control signal /XFER and the write signal /WR2 are both low, the secondary latch control signal is high, and the output of the 8-bit DAC register changes with the input. After that, when /WR2 changes from low to high, the control signal becomes low, and the information of the input register is latched into the DAC register.
The functions of the remaining pins in Figure 1-1 are defined as follows:
(1) DI7~DI0: 8-bit data input terminal, DI7 is the highest bit.
(2) IOUT1: Analog current output terminal 1. When the data in the DAC register are all 1, the output current is maximum. When the data in the DAC register are all 0, the output current is 0.
(3) IOUT2: Analog current output terminal 2. The sum of IOUT2 and IOUT1 is a constant, that is, IOUT1 + IOUT2 = constant.
(4) RFB: Feedback resistor lead-out terminal. DAC0832 already has a feedback resistor inside, so the RFB terminal can be directly connected to the output terminal of the external operational amplifier. This is equivalent to connecting a feedback resistor between the output and input terminals of the operational amplifier.
(5) VREF: Reference voltage input terminal. This terminal can be connected to a positive voltage or a negative voltage. It determines the amplitude of the analog voltage value converted from the digital value of 0 to 255. The VREF range is (+10 to -10) V. The VREF terminal is connected to the T-shaped resistor network inside the D/A.
(6) Vcc: Chip power supply voltage, ranging from (+5~15)V.
(7) AGND: Analog ground, that is, the ground terminal of the analog circuit.
(8) DGND: digital ground.
Below is the microcontroller driver:
#include
#include
#define uchar unsigned char
#define uint unsigned int
sbit CS = P1^0;
sbit CLK = P1^1;
sbit DI = P1^2;
sbit DO = P1^2;
uchar code Tab[]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,0x07,0x7F,0x6F};
void delay(uint z)
{
uint x,y;
for(x=z;x>0;x--)
for(y=110;y>0;y--);
}
void Display(uint dat) //The displayed value is millivolts
{
uchar ge,shi,bai,qian;
qian = dat/1000%10;
bai = dat/100%10;
shi = dat/10%10;
ge = dat%10;
P2 = 0xfe;
P0 = Tab[qian]|0x80; //Add decimal point to the highest bit
delay(1);
P2 = 0xfd;
P0 = Tab[bai];
delay(1);
P2 = 0xfb;
P0 = Tab[shi];
delay(1);
P2 = 0xf7;
P0 = Tab[ge];
delay(1);
}
uchar ADC0832(bit mode,bit channel) //AD conversion, return result
{
uchar i,dat,ndat;
CS = 0;//Pull down CS end
_nop_();
_nop_();
DI = 1; //The first falling edge is high to
CLK = 1;//Pull up CLK end
_nop_();
_nop_();
CLK = 0;//Pull the CLK end low to form a falling edge 1
_nop_();
_nop_();
DI = mode; //Low level is differential mode, level is single channel mode
CLK = 1;//Pull up the CLK end
_nop_();
_nop_();
CLK = 0;//Pull the CLK end low to form a falling edge 2
_nop_();
_nop_();
DI = channel;//Low level is CH0, high level is H1
CLK = 1;//Pull up the CLK end
_nop_();
_nop_();
CLK = 0;//Pull the CLK end low to form a falling edge 3
DI = 1;//End of control command (necessary after testing)
dat = 0;
//Start reading the converted data below, and output it in sequence from the highest bit (D7~D0)
for(i = 0;i < 8;i++)
{
dat <<= 1;
CLK=1;//Pull up the clock
end_nop_();
_nop_();
CLK=0;//Pull down the clock end to form a clock pulse_nop_
();
_nop_();
dat |= DO;
}
ndat = 0; //Record D0
if(DO == 1)
ndat |= 0x80;
//Next, continue to read the reverse data (from D1 to D7)
for(i = 0;i < 7;i++)
{
ndat >>= 1;
CLK = 1;//Pull up the clock end_nop_
();
_nop_();
CLK=0;//Pull down the clock end to form a clock pulse
_nop_();
_nop_();
if(DO==1)
ndat |= 0x80;
}
CS=1;//Pull up the CS end to end the conversion
CLK=0;//Pull down the CLK end
DI=1;//Pull up the data end to return to the initial state
if(dat==ndat)
return(dat);
else
return 0;
}
void main()
{
uint adc;
while(1)
{
adc = ADC0832(0,0); //Differential mode, CH0-CH1
adc = adc*19.607843; //Convert to actual voltage for easy display Display
(adc);
}
}
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