How to correctly configure AVR fuse bits

Introduction: The configuration of AVR fuse bits is a relatively delicate task, and users often overlook its importance or find it difficult to master. Here are some key points and related matters that need to be paid attention to when configuring AVR fuse bits.

(1) In the AVR device manual, the fuse bit states are defined as programmed (Programmed) and unprogrammed (Unprogrammed). "Unprogrammed" means the fuse state is "1" (disabled); "Programmed" means the fuse state is "0" (allowed). Therefore, the process of configuring the fuse bit is actually "configuring the fuse bit to be in the unprogrammed state "1" or in the programmed state "0"". The fuse bit status display box shows the detailed status of each fuse bit of the chip. AVR fuse bits with a check mark indicate 0, indicating that the option is enabled; unchecked indicates 1, indicating that the option is not enabled. Please note this.

(2) When using programming tool software that determines the fuse bit status value by selecting the check mark “√”, please first read the software instructions carefully to understand whether “√” means setting the fuse bit status to “ or “.

(3) When using the programming download program in CVAVR, special attention should be paid. Since the initial state of most fuse bits is defined as " when the CVAVR programming download interface is initially opened, do not use the "all" option in its programming menu options. At this time, the "all" option will configure the fuse bits of the chip according to the initial state definition of the fuse bits, but in fact it is often not the configuration result required by the user. If you want to use the "all" option, you should first use "read->fusebits" to read the actual state of the fuse bits in the chip, and then use the "all" option.

(4) Before using a new AVR chip, you should first check the configuration of its fuse bits, then configure the fuse bits according to actual needs, and record the status of each fuse bit for filing.

(5) After the AVR chip is encrypted, only the data in the internal Flash and E2PROM of the chip cannot be read. The status of the fuse bits can still be read, but the configuration cannot be modified. The chip erase command clears the data in the Flash and E2PROM, and at the same time configures the status of the two lock bits to ", which is in an unlocked state. However, the chip erase command does not change the status of other fuse bits.

(6) The correct operation procedure is: when the chip is unlocked, download the running code and data, configure the relevant fuse bits, and finally configure the chip lock bits. After the chip is locked, if the fuse bits are found to be incorrectly configured, the chip erase command must be used to clear the data in the chip and unlock it. Then re-download the running code and data, modify the configuration-related fuse bits, and finally configure the chip lock bits again.

(7) When using ISP serial download programming, the SPIEN fuse bit should be configured to "". The default state of the SPIEN bit when the chip leaves the factory is ", indicating that ISP serial download data is allowed. Only when this bit is in the programmed state ", can ISP download be performed through the AVR's SPI port. If this bit is configured as "unprogrammed", ISP serial download data is immediately prohibited. At this time, the SPIEN state can only be reset to " through parallel mode or JTAG programming mode to open ISP. Under normal circumstances, the SPIEN state should be kept ". Allowing ISP programming will not affect the I/O function of its pins, as long as the ISP interface and the devices connected in parallel are isolated when designing the hardware circuit, such as using series resistors or circuit breaker jumpers.

(8) When your system does not use the JTAG interface for download programming or real-time online simulation debugging, and the pins of the JTAG interface need to be used as I/O ports, the fuse bit JTAGEN must be set to "". The JTAGEN status defaults to " when the chip leaves the factory, indicating that the JTAG interface is allowed, and the external pins of JTAG cannot be used as I/O ports. When the JTAGEN status is set to ", the JTAG interface is immediately disabled. At this time, JTAG can only be reset to " and JTAG can be opened through parallel mode or ISP programming.

(9) In general, do not set the fuse to define the RESET pin as I/O (such as setting the ATmega8 fuse RSTDISBL to "). This will cause the ISP download programming to fail, because before entering the ISP mode programming, the RESET pin needs to be pulled low to put the chip into the reset state first.

(10) When using an AVR chip with an internal RC oscillator, pay special attention to the configuration of the fuse bit CKSEL. Generally, the default state of the CKSEL bit when the chip leaves the factory is to use the internal 1MHz RC oscillator as the system clock source. If you use an external oscillator as the system clock source, do not forget to correctly configure the CKSEL fuse bit first, otherwise the timing of your entire system will be problematic. When your design does not use an external oscillator (or a specific oscillation source) as the system clock source, do not misoperate or mistakenly configure the CKSEL fuse bit to use an external oscillator (or other different types of oscillation sources). Once this happens, the chip cannot be operated using the ISP programming method (because the ISP method requires the chip's system clock to work and generate timing control signals), and the chip looks "broken". At this time, the only way to save it is to remove the chip and use the parallel programming method, or use the JTAG method (if JTAG is allowed and there is a JTAG interface on the target board). Another way to solve the problem is to try to temporarily add different types of oscillation clock signals to the crystal pins of the chip. Once the ISP can operate the chip, immediately configure CKSEL to use the internal 1MHz RC oscillator as the system clock source, and then reconfigure CKSEL correctly according to the actual situation.

(11) When using an AVR chip that supports IAP, if you do not use the BOOTLOADER function, be careful not to set the fuse bit BOOTRST to the "state", which will cause the chip to execute the program not from 0x0000 of the Flash when it is powered on. The default state of the BOOTRST bit is " when the chip leaves the factory. For the configuration of BOOTRST, the design of the BOOTLOADER program and the application of IAP, please refer to the relevant content in this chapter.

(12) CKOPT: When CKOPT is not programmed, that is, unchecked, it is in the 0 state for a crystal oscillator; when checked, it is selected for a resonator; XTAL1 and XTAL2 are respectively used as the input and output of the reverse amplifier of the on-chip oscillator, as shown in Figure 12. This oscillator can use a quartz crystal or a ceramic resonator. The fuse bit CKOPT is used to select one of these two amplifier modes.

When CKOPT is programmed, the oscillator generates full amplitude oscillation at the output pin. This mode is suitable for noisy environments and when a second clock buffer needs to be driven through XTAL2. In addition, the frequency range of this mode is relatively wide. When CKOPT is kept unprogrammed, the output signal amplitude of the oscillator is relatively small. Its advantage is that the power consumption is greatly reduced, but the frequency range is relatively narrow and it cannot drive other clock buffers.

For resonators, the maximum frequency is 8MHz when CKOPT is not programmed and 16MHz when CKOPT is programmed. The values ​​of C1 and C2 should be the same regardless of whether a crystal or resonator is used. The best value depends on the crystal or resonator used, as well as on stray capacitance and environmental electromagnetic noise.