What is the principle of this negative pressure module in the circuit?

kal9623287

What is the principle of this negative pressure module in the circuit? [Copy link]

 

The picture below shows a typical driver chip IC. I want to know what the principle of the negative pressure module in the dotted box is?

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maychang

This is a rectifier circuit. Due to the drive of the chip OUT terminal, the rectifier circuit generates a positive voltage on the left and a negative voltage on the right at both ends of the capacitor C Z , so it is called a negative voltage module.

kal9623287

maychang posted on 2022-7-27 15:24 This is a rectifier circuit. Due to the drive of the chip OUT end, the rectifier circuit generates a positive voltage on the left and a negative voltage on the right at both ends of the capacitor CZ, so it is called a negative voltage module. ...

Due to the drive of the chip OUT terminal, the rectifier circuit generates a positive voltage on the left and a negative voltage on the right across the capacitor CZ. How do you understand this?

Can you explain in detail how it works?

maychang

kal9623287 published on 2022-7-28 15:51 Due to the drive of the chip OUT terminal, the rectifier circuit generates a positive voltage on the left and a negative voltage on the right at both ends of the capacitor CZ. How do you understand this? Can you explain the working...

The OUT terminal outputs a rectangular wave with a low level of zero and a high level approximately equal to V DD . Looking to the right of the MOS tube gate, there is a capacitor, the other end of which is grounded.

Assume that neither C Z nor the MOS tube gate capacitance stores any charge at the beginning.

The OUT terminal changes from zero to a high level, and the high level will divide the voltage between CZ , RON and the gate capacitance of the MOS tube. CZ is charged, with the direction being positive on the left and negative on the right. The gate capacitance of the MOS tube is charged, with the direction being positive on the top and negative on the bottom, and the MOS tube is turned on.

The OUT terminal changes from a high level to zero, the voltage across C Z cannot change suddenly, the potential at the left end is zero, and the right end is obviously a negative voltage.

kal9623287

maychang posted on 2022-7-28 16:14 kal9623287 posted on 2022-7-28 15:51 Due to the drive of the chip OUT end, the rectifier circuit generates a positive voltage on the left and a negative voltage on the right at both ends of the capacitor CZ, which...

has nothing to do with Dz?

kal9623287

This negative pressure module has capacitors and diodes

What does Dz do?

maychang

kal9623287 posted on 2022-7-29 09:50 No relation to Dz?

"Nothing to do with Dz?"

Of course it is related. Without the rectifier tube, how can it be called a rectifier circuit?

Pay attention to the paragraph on the 5th floor. The second sentence says that the OUT terminal changes from zero to high level. In this process, Dz has no current due to reverse flow, and the current output by OUT high level charges Cz and the gate capacitance of the MOS tube. The third sentence says that the OUT terminal changes from high level to zero, and in this process the gate capacitance of the MOS tube discharges (how to turn off the MOS tube without discharge?), and the discharge current flows through Dz, and at this time Dz is forward-conducted.

maychang

kal9623287 posted on 2022-7-29 09:50 No relation to Dz?

Of course, when the OUT terminal changes from high level to zero, during the discharge of the MOS tube gate capacitance, Dz is turned on, and the MOS tube gate capacitance discharge current will also flow through Cz. However, during this process, the voltage across Dz is only a PN junction voltage drop, and the amount of charge discharged by Cz during this process is much less than the amount of charge charged in the previous stage.

kal9623287

maychang posted on 2022-7-29 10:24 "It has nothing to do with Dz?" Of course it has something to do with it. Without a rectifier tube, how can it be called a rectifier circuit? Pay attention to the paragraph on the 5th floor. The second sentence says...

The teacher started to explain the working principle. Why didn't he say anything about Dz at the beginning?

Why is this Dz rectified here?

Isn't this negative voltage clamped by the forward voltage of Dz?

kal9623287

Please tell me, why is there a rectifier circuit here?

There should be Dz voltage regulator clamps at both ends of Cz.

maychang

kal9623287 posted on 2022-7-29 12:59 Please tell me, why is there a rectifier circuit here? There should be a Dz voltage regulator clamp at both ends of Cz

"Teacher, why is there a rectifier circuit here?"

This is indeed a rectifier circuit. However, it is not mentioned in most textbooks.

Usually textbooks talk about half-wave rectification, full-wave rectification and bridge rectification, and some books talk about voltage doubling rectification. Among them, half-wave rectification should be called series rectification, because the rectifier and the load (including the filter capacitor) are in series. But the rectifier and the load (including the filter capacitor) in the first circuit are in parallel, so this circuit can be called parallel half-wave rectification.

To explain that this is parallel rectification, I need to draw two pictures to make it clear. Let me draw the pictures first.

maychang

kal9623287 posted on 2022-7-29 12:59 Please tell me, why is there a rectifier circuit here? There should be a Dz voltage regulator clamp at both ends of Cz

Picture (1)

The figure above is the most basic half-wave rectifier circuit. The voltage direction across the load R is positive at the top and negative at the bottom. If the diode voltage drop is ignored, the output voltage is the peak value of the AC voltage across the signal source S (regardless of whether S outputs a sine wave or a rectangular wave), provided that the internal resistance of S is small enough and the RC time constant is large enough relative to the period of S.

maychang

kal9623287 posted on 2022-7-29 12:59 Please tell me, why is there a rectifier circuit here? There should be a Dz voltage regulator clamp at both ends of Cz

Picture (2)

By swapping the positions of the diode and capacitor in Figure (1), we get Figure (2). In Figure (1), the diode D and the load R are in series, but in Figure (2), the diode D and the load R are in parallel.

Figure (2) can also achieve rectification, and the DC voltage across R is still the peak value of the AC voltage across the signal source S.

This circuit assumes that the voltage across C is zero at the initial moment. In the first positive half cycle, the S voltage will be applied to R through C, D is cut off, and the voltage waveform across R is the S positive half cycle waveform. In the first negative half cycle, S will charge C through D, and the voltage direction across C is negative on the left and positive on the right, and C will be charged to the peak value of S. In the second positive half cycle, the S voltage is still applied to R through C, which will cause C to discharge slightly, but the amount of discharge charge is much smaller than the amount of S charging C through D in the first negative half cycle, because R is large enough and the internal resistance of D is close to zero and can be ignored. The second negative half cycle repeats the action of the first negative half cycle, and S charges C through D. The actions of the third, fourth, and... cycles are similar to the second cycle. Note that the DC voltage across C is the peak value of the S AC voltage, negative on the left and positive on the right.

Therefore, the voltage waveform across R is similar to Figure (1). In the negative half of each cycle, S charges C through D, and in the positive half of each cycle, the voltage across S is superimposed on the voltage across C and applied to R.

maychang

kal9623287 posted on 2022-7-29 12:59 Please tell me, why is there a rectifier circuit here? There should be a Dz voltage regulator clamp at both ends of Cz

Pictures (3)

If a capacitor is connected in parallel across R in Figure (2), it becomes Figure (3). In Figure (3), we swap D up and down, which does not matter, it only affects the direction of the voltage across R.

C in Figure (2) is marked as C1 in Figure (3), and the new capacitor connected in parallel across R is marked as C2. Generally, it is required that C1>>C2.

Connecting C2 in parallel with R will only make the ripple across R smaller and will not have any other impact on the operation of the entire circuit, because there is originally a DC voltage across R.

Note: Figure (3) is the result of ignoring R OFF , R ON , and D OFF in the figure in your first post. S in Figure (3) is the voltage between OUT and ground in the figure in your first post. C1 in Figure (3) is the capacitance between the gate of the MOS tube to ground in the figure in your first post. C2 in Figure (3) is C Z in the figure in your first post . D in Figure (3) is D Z in the figure in your first post . The voltage across R in Figure (3) is negative at the top and positive at the bottom. Judge for yourself which direction the voltage across C Z in the figure in your first post should correspond to.

maychang

kal9623287 posted on 2022-7-29 12:59 Please tell me, why is there a rectifier circuit here? There should be a Dz voltage regulator clamp at both ends of Cz

Look at Figure (3) carefully and compare it with the components in the first post one by one, and you will know that it is not a "Dz Zener clamp".