How to set the frequency and duty cycle of PWM in STM32? See here

The following is the timer logic diagram of STM32 , which helps to understand:

TIM3's ARR register and PSC register,

Determine the PWM frequency.

The two timers configured here determine the frequency of PWM. My understanding is that the period (frequency) of PWM is the multiplication of the ARR register value and the PSC register value, but it is not a simple multiplication. For example, to set the frequency of PWM, refer to the algorithm for setting the overflow time in the last general timer. For example, to output PWM with a frequency of 100HZ, first determine the clock of TIMx. Unless the clock division number of APB1 is set to 1, the clock of the general timer TIMx is twice the clock of APB1. At this time, the clock of TIMx is The value is 72MHz. Divide the TIMx clock 72MHz by (PSC+1) to get the timer increment every few seconds. Here, assign 7199 to PSC, and calculate that the timer increments every 0.0001 seconds, that is, the frequency is 10KHz. Multiply this value by (ARR+1) to get the PWM frequency. If the ARR value is 0, that is, 0.0001*(0+1), the output PWM frequency is 10KHz. If the output frequency is 100Hz PWM, set the ARR register to 99. If you want to adjust the PWM duty cycle accuracy, just reduce the value of the PSC register.

The TIMx_CCRx register determines the PWM duty cycle.

TIMx_CCR1-TIMx_CCR4 determine the duty cycle of the four PWM channels CH1-CH4 of the timer. Simply assign a value of 0-65535 to this register to determine the duty cycle. Duty cycle calculation method: The value of TIMx_CCRx divided by the value of the ARR register is the duty cycle. Because the duty cycle is between 0-100%, the value of the TIMx_CCRx register cannot exceed the value of the ARR register, otherwise it may cause the accuracy of the PWM frequency or duty cycle.