STM32F1x series memory structure

The Crotex_M3 core memory used by STM32 uses Harvard structure. The program memory, data memory, registers, and peripherals are all allocated in the linear space of 4G_bytes (32bits bus width), but not all spaces are valid.
The memory uses little-endian mode. Definition of

little-endian mode and big-endian mode
:
a) Little-Endian means that the low-order bytes are arranged at the low address end of the memory, and the high-order bytes are arranged at the high address end of the memory.
b) Big-Endian means that the high-order bytes are arranged at the low-address end of the memory, and the low-order bytes are arranged at the high-address end of the memory.

32-bit data 0x12345678 is stored starting from address 0x20000000. The storage difference between little-endian and big-endian is shown in the figure below. Little-
endian mode Big-endian mode SRAM The starting address of SRAM starts at address 0x2000 0000, and can be accessed by word (32-bits), half-word (16-bits), and byte (8-bits) bit-band The SRAM and peripheral registers of STM32 cannot be accessed by bit, but STM32 maps two areas called bit-band to all SRAM and peripheral registers. The word write in this area corresponds to the bit write of SRAM. Area mapping algorithm bit_word_addr = bit_band_base + (byte_offset x 32) + (bit_number × 4) bit_band_base is the starting address of the bit-band. The bit-band has two areas 0x2200 0000 and 0x4200 0000, which correspond to SRAM and peripherals respectively . byte_offset SRAM corresponds to the offset address of the starting location 0x20000000. bit_number is the bit number to be accessed . For example, if you need to access memory bit-2 of 0x2000 0300, the formula should be 0x22006008 = 0x22000000 + (0x300*32) + (2*4). Flash The read and write interface (FLITF) of the flash includes read expectation cache, option bytes, Flash write/erase, and read/write protection. Read: Reading flash requires programming wait counts. Different SYSCLK wait counts have different instruction expectations. This function automatically starts half a cycle after the system is reset   to save power. Writing and erasing flash can only write half a word. To perform erase and write operations, the internal RC oscillator (HSI) must be turned on. The flash erase operation can perform page and full flash erase . The pages of STM32 are divided into 1kbyte or 2Kbyte. Boot STM32 provides 3 different boot modes . Main Flash memory: The program starts running from 0x80000000 System memory; start ISP mode Embedded SRAM: Run from SRAM from now on