STM32Fxx JTAG/SWD multiplexing function remapping

Problem Description:

During the laboratory tuning process, I encountered a problem: In order to facilitate program downloading every time, the team members often plugged Jlink into the board, but during the tuning process, they found that sometimes the program would die inexplicably, while the same program would not have this problem if Jlink was unplugged. And PB3 and PB4 are both set as output ports, and the output is high level. When measured with a multimeter, PB4 is high, but PB3 is not high level. When looking at the register values ​​in MDK, PB3 and PB4 are both high? Why are the register values ​​different from the actual values?

After careful research, we found the crux of the problem:

After checking the manual, I found that after reset, PB3 of the JTAG interface was set to floating (if the pin is floating, the level read from the port is uncertain), so the level read back is also uncertain.

PA13-PA14-PA15-PB3-PB4-PB5 of STM32 are mainly used for JTAG debugging, so by default they are in JTAG mode after startup. These pins are used as ordinary I/O ports in the project program, but the I/O mode configuration is not initialized. Therefore, when JTAG is not needed and the GPIO port needs to be fully utilized, JTAG needs to be turned off and set to GPIO mode.

http://blog.csdn.net/wg1194024093/article/details/54849686

STM32 commonly used pins redefine peripherals

http://blog.sina.com.cn/s/blog_a07a3f180101e6ow.html

The difference between the method of setting JTAG pins as normal IO ports in STM32f1 and the method in STM32f4

http://blog.csdn.net/wangyinyun1/article/details/48239725