Model: stm8s903k3
Compiler: STVD4.3.5+cosmic 8k 5.4.1
Others: Use operation registers, do not use libraries
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The clock is the soul of the microcontroller, and everything is related to the clock. Compared with the inhuman fuse bit setting of AVR for clock/oscillation source, stm only needs to operate the register. The most important thing is that even if the setting is wrong, it will not lock up!
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Schematic diagram of stm internal clock.
As can be seen from the figure, the system clock can be provided by the external HSE (high speed external) or the internal high speed clock HSI (high speed internal) or the internal low speed clock LSI (low speed internal). Here we take the internal high speed clock as an example. The internal high speed clock HSI is divided by HSIDIV to get the Fmaster clock. Please note that, as the name implies, this clock is the main clock. All other clocks in the chip are divided by this clock (distributed once), and it also controls the gates of these peripheral clocks (open or close).
Fmaster is the trunk, the internal/external clock is the root, and the CPU or peripheral clock is the branch. There are many roots and branches, but there is only one trunk.
Therefore, the idea of configuring the clock is.
First, determine the value of Fmaster. The default is division by 8, which we can change through the HSIDIV bit.
Second, determine the CPU frequency by setting CPUDIV.
The third option is to enable the peripheral clocks. If there are power requirements, turning off unused clocks can reduce power consumption. All are enabled by default.
Fourth, other settings, clock switching, SWIM, clock output, etc. The following source code is not set by default.
Below is the source code
/************************************************************************/
/* Function: Clock configuration initialization
* Parameters: None
* Return: None
* Modified: 2014-11-14
* Reason: Global clock initialization, main frequency, gate bit */
/************************************************************************/
void clk_init(void)
{
/*For the internal high-speed clock HSI[16MHz], its logical relationship is HSI---[HSIDIV division]---[clock selection gate]---
* Master clock Fmaster---{[CPUDIV division]---Fcpu clock; other peripheral clocks}
*/
CLK_ICKR = 0x01; //Internal clock control register. Reset value, enable HSI clock, fast wake-up disable
CLK_ECKR = 0x00; //External clock control register。HSE禁止。
CLK_SWR = 0xE1; //Clock master switch register. Select HSI as the master clock.
CLK_SWCR = 0x00; //Clock switch control register. Clock switching, the Chinese data sheet translation seems to be wrong
/*Clock divider register. Divides the frequency of Fmaster and Fcpu.
* The default is 8 and 1, now it is 2 and 1, so Fmaster=8M, Fcpu=8M */
CLK_CKDIVR = 0x08;
CLK_PCKENR1 = 0xFF; //Peripheral clock gating register 1. Fmaster is connected to the peripheral clock
CLK_PCKENR2 = 0x0; //same as above
CLK_CSSR = 0x0; //Clock security system register. Clock security detection
CLK_CCOR = 0x0; //Configurable clock control register. Clock output is turned off
}
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Update, stm has an LSI calibration function, please refer to the chip manual for details. And this calibration function, the library function has been written. But there are two points to note when using it.
First, the LSI calibration function of the library function uses AWU and TIM3, so in the above configuration, CLK_PCKENR2 should be configured to turn on the AWU peripheral, otherwise it will be an infinite loop.
Second, if TIM3 needs to perform other functions, it must be configured after LSI calibration, that is, the sequence is main clock initialization ---- LSI calibration ---- TIM3 configuration, otherwise TIM3 will not be started
3. The above LSI calibration procedure comes from the latest official firmware library. In fact, I personally think that if the frequency requirement is not strict, you don’t need to configure it, such as the buzzer…
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Recommended ReadingLatest update time:2024-11-16 11:38
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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