When mass-producing and debugging equipment in actual projects, the author found that the same version of the program had inconsistent effects when running on different devices. Some devices had normal serial port communication, while others had abnormal serial port communication. Through the oscilloscope test of the serial port baud rate and system clock frequency of multiple devices, it was found that there were differences in the system clock frequency and baud rate between different devices, which were inconsistent with the theoretical values. The system clock frequency and baud rate tested by the oscilloscope had a large deviation from the theoretical value. Due to the deviation of the system clock frequency, the baud rate setting value exceeded the maximum error value allowed by the serial port, which led to the failure of serial port communication. The root cause is that the system clock frequency will change with the ambient temperature, voltage or other factors.
1 Cause Analysis
In asynchronous communication, the baud rate is a very important indicator, which is expressed as the number of bits of binary digits transmitted per second, reflecting the speed of asynchronous serial communication. The baud rate generator of MSP430 uses a frequency division counter and an adjuster to form a frequency division factor. This method can achieve high-speed communication with a lower clock frequency, thereby achieving high-performance serial communication under low system power consumption. The clock source of the MSP430 baud rate generator can be the universal clock (UCLK), auxiliary clock (ACLK), and subsystem master clock (SMCLK). Among them, ACLK is usually 32 768 Hz, which is stable but cannot meet the requirements of high-speed serial communication; SMCLK is a configurable system frequency that can meet the requirements of high-speed serial communication, but it is unstable. SMCLK is a digitally controlled oscillator (DCO) regulator module that mixes two frequencies Fdco and Fdco+ to generate a frequency between Fdco and Fdco+1. In essence, this modulation spreads the clock energy into a wide band, reducing electromagnetic interference (EMI). However, the negative impact of the average frequency modulated clock obtained in this way is the frequency jitter.
The DCO frequency fluctuates with changes in temperature and voltage. When fDCO=1 MHz, the ratio of the drift frequency to the drift temperature is 0.1%/℃, and the ratio of the drift frequency to the drift voltage is 1.9%/V. Therefore, when SMCLK is used as the serial port clock source, the frequency division factor calculated by the theoretical frequency is different from the actual frequency division factor, resulting in the serial port being unable to communicate.
2 Solutions
2.1 Solution 1 - Automatic baud rate detection mode
MSP430 serial port communication supports automatic baud rate detection. In this communication mode, there will be a synchronization sequence containing a break/sync field in front of the data frame, as shown in Figure 1. For the consistency of LIN, the character format in this mode should be 8 data bits, low bit first, no parity bit and stop bit, and the address bit is not available. When receiving the break/sync field, the serial port cannot send data. If a 0H byte is received under a frame error, any data sent at this time will be destroyed. It can be seen that its communication process is more complicated and inconvenient to use.
2.2 Solution 2 - External high-frequency crystal oscillator
MSP430 can be connected to a stable high-speed crystal oscillator, but this series of chips is designed as an ultra-low-power microcontroller. If an external high-frequency crystal oscillator is connected, it will violate the low-power design concept of this series. That is, when the MCU enters the low-power mode (LPM), the crystal oscillator does not enter the low-power mode and will continue to consume power, which will increase the power consumption of the system and reduce the battery life.
2.3 Solution 3 - Automatically calculate the baud rate based on the clock source.
The internal low-frequency crystal oscillator can be used, usually 32 768 Hz. After the DCO regulator, a higher frequency FSMCLK is generated for high-speed serial communication. This frequency is generated by the DCO regulator module mixing Fdco and Fdco+1 within 32 DCO clock cycles. The frequency is between Fdco and Fdco+1. This regulation mode essentially reduces electromagnetic interference. And FSMCLK will automatically turn off after the MCU enters the LPM mode to save power until the MCU exits the low-power mode. After obtaining the high-frequency clock, FSMCLK can be accurately calculated through two timers, and the baud rate can be set according to this value. This method can eliminate device differences to ensure that the microcontroller serial port works normally under different temperatures and voltages. This solution is simple, easy to implement, has strong anti-electromagnetic interference, good power saving effect, and to a certain extent eliminates the impact of system frequency changes with temperature and voltage. This solution is better than Solution 1 and Solution 2; its implementation process is shown in Figure 2.
3 Calculation of system operating frequency
For timer A0, its clock source frequency is F0. Timer A0 works in counter mode and is set to generate an interrupt every T0 counts, that is, the time t0 of each interrupt is:
For timer A1, its clock source frequency is F1. Timer A1 works in counter mode and is set to generate an interrupt every T1 counts, that is, the time t1 of each interrupt is:
4 Baud rate setting
For a given serial port clock source BRCLK, the division factor N satisfies:
N=BRCLK/Baudrate
The division factor N is often not an integer. Therefore, at least one division counter and one adjuster are required to generate a number close to the division factor N.
In low frequency mode, the integer division factor satisfies:
UCBRx=INT(N)
and the fractional part satisfies the following formula:
UCBRSx=round[(N-INT(N))×8]
The baud rate setting procedure is as follows:
division_factor=f_smclk/(Baudrate*1.0);
UCA0BR0=(int)division_factor;
UCA0BR1=((int)division_factor)>>8;
UCA0MCTL|=(int)((division_factor_(int)division_factor)*8);
5 Solution verification
As described in Solution 3, first measure the current frequency of the serial port clock source, and then set the baud rate register and adjuster values according to the frequency. Download the modified program to multiple devices that can communicate with the serial port and cannot communicate with the serial port for verification. Through oscilloscope testing, it is found that the clock frequencies of the devices under test are different, and the frequencies of the devices are not necessarily the same. At the same time, it is found that the actual baud rate of the serial port is consistent with the theoretical baud rate, which is manifested as the normal communication of the serial port. At this point, Solution 3 has been verified, and this solution can effectively avoid the problem of communication failure caused by the clock offset of the serial port clock source.
Conclusion
Practice has proved that the method of calculating the high-frequency clock after the internal clock is multiplied and then setting the serial port baud rate according to the clock frequency is feasible. This method effectively solves the problem of serial port communication failure caused by factors such as unstable internal clock frequency of the microcontroller, system clock frequency deviation caused by ambient temperature, air pressure, electromagnetic, etc., and differences between microcontroller devices from a pure software perspective.
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