/**************************Asm version**********************************/
/*Purpose of the experiment:
Test the PWM output function of the CCU module (control the duty cycle).
The duty cycle is controlled by TOR2H, TOR2L, OCRAH, and ORCAL.
The required voltage value is obtained by controlling the duty cycle
*/
$NOMOD51
$INCLUDE(REG932.INC) //
PLEEN BIT TCR20.7
ORG 0000H
AJMP MAIN
ORG 0100H
MAIN:
MOV P2M1,#0x00 ; Set port mode
MOV P2M2,#0xFF ; Set P26,OCA to push-pull output
MOV TCR21,#0x04 ; Frequency division operation
MOV TOR2H,#0x00 ; Reload value 0x00FF=255
MOV TOR2L,#0xF0 ; -> PWM period
MOV A,TCR21
ANL A,#0x80
MOV TCR21,A
MOV OCRAH,#0x00 ; Control duty cycle
MOV OCRAL,#0xA0 ;
MOV A,TCR21
ANL A,#0x80
MOV TCR21,A
MOV CCCRA,#0x01
SETB PLEEN ; Start PLL
SETB OCA
LOOP:
JNB PLEEN,LOOP ; Wait until PLL locks
MOV TCR20,#0x82 ; Set output mode, non-inverting PWM
SJMP $
RET
END
/************************************************************/
/**************************C version************************************/
/*Purpose of the experiment:
Test the PWM output function of the CCU module (control the duty cycle).
The duty cycle is controlled by TOR2H, TOR2L, OCRAH, and ORCAL.
The required voltage value is obtained by controlling the duty cycle
*/
#include
sbit PLEEN=TCR20^7;
main()
{
P2M1=0x00; //Set port mode
P2M2=0xFF; //Set P26, OCA to push-pull output
TCR21=0x04; //Frequency division operation
TOR2H=0x00; //Reload value 0x00FF=255
TOR2L=0xF0; // -> PWM period
TCR21|=0x80;
OCRAH=0x00; //Control duty cycle
OCRAL=0xA0; //
TCR21|=0x80;
CCCRA=0x01;
PLEEN=1; // Start PLL
OCA=1;
while(PLEEN==0); // Wait until PLL locks
TCR20=0x82; // Set output mode, non-inverting PWM
while(1);
}
/******************************************************************/
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