STM32 timer self-study notes

I have been studying STM32 timers for more than a week, and it is really confusing. The various modes are mainly because we don't know much about the application of the various modes of the timer. However, we can get started quickly with the basic part of the timer. That is, the update event interrupt after the timer is completed. Capture and comparison are acceptable, but the slave mode, trigger, Hall sensor and encoder are directly confusing, not to mention the brake, dead zone, complementation, etc. in the advanced timer.

When I looked at timers, I looked at general timers, mainly brakes, encoders, etc. These are rarely used by me, and even if I use them one day, I forget them. I looked at the general timer no less than 4 times. Finally, I can sort it out. Let me talk about it slowly below.

The general timer has the following modes:

Counting mode (count up, count down, center-aligned count)

Capture comparison mode: (Capture) 1. Input capture mode

2. PWM input mode

(Comparison) 1. Forced output mode

2. Comparison output mode

3. PWM mode

4. Single pulse mode

Encoder Mode

Slave mode 1, reset mode

2. Gated mode

3. Trigger mode

4. External clock mode + trigger mode

Main Mode

Clock: 1. Internal clock

2. External clock 1

2. External clock 2

This is just for a better understanding, and more details can be found in the data sheet. And the timer does give you a new understanding every time you look at it, so I'm not sure it's completely correct.

First, the correspondence between all modes can be seen in the internal diagram given by the timer. When you have a certain understanding of the timer, you can understand the diagram more clearly.

In order to avoid clutter, we only analyze the graph.

The shaded parts in the figure have a shadow register and are enabled. In PWM mode, the shadow register must be enabled.

Looking at the left side of the picture, there are TIMX_ETR, TIMX_CH1, TIMX_CH2... These pins are input pins, and TIMX_ETR is a trigger pin. Regardless of what they do for now, look at TIMX_CH1 on the right, these are comparison output pins.

Generally, the clock in the data manual starts to get confusing backwards. The timer has three types of clocks (the book says four, but in fact the fourth is one of the second). You can see the rectangle above the picture, which contains "trigger controller, slave mode controller, encoder".

1. You can see that the internal clock (CK_INT) is connected to this rectangle.

2. The external trigger pin TIMX_ETR pin is filtered and processed to form the ETRF signal, which is also connected here (it can provide the clock mentioned in external clock mode 2, and it can also trigger)

3. ITR0, ITR1 and other signals are also connected to this rectangle. These signals are the output signals of other timers. (This is also what the manual says about using a timer as a pre-scaling of another timer. Then the timer driving this timer is the master timer. The MMS bit in TIMX_CR2 must be configured to determine what kind of signal it outputs to the slave timer. The TS bit in TIMX_SMCR is set to select which timer to drive the current timer)

4. TIMX_CH1~CH4 can also be configured as trigger input pins and can also provide clocks for the timer.

In TIMX_SMCR (slave mode control register), SMS is set to 000 (slave mode is turned off), and the clock is provided by the internal clock when the timer is enabled. When the SMS bit is configured to a non-zero value, and the input pin is selected in the TS bit, and the related clock is enabled, an edge or a level on the pin will be used to drive the counter to count, and the external clock 2 can only be provided by ETR, and the external clock 1 can also be provided by ETR or other pins.

In addition to the internal clock, other pins connected to the slave mode controller (the encoder is not clear, I didn't see it, and the following is not related to it) can not only provide clocks, but also generate corresponding events. For example, when clock mode 2 is turned off and clock mode 1 is not selected, the external trigger pin (other input pins can also be used) can reset the counter, start the counter, etc.

CH1~CH4 can control the slave mode, and it can also be used as an input for a capture signal. At this time, the slave mode can be turned off, or the clock mode 1 input signal in the slave mode can be turned on to save the current counter value into the CCR register.

The output of CH1~CH4 is set to the set level by setting the value of CCR register. When the timer is set to master mode, the output 0CXREF will be output internally to the slave mode timer, and the slave mode timer will generate the event set by SMS in SMCR.

After talking so much, I am confused. In short, the input pins usually work in slave mode, that is, the timer counter counts or stops by these pins. (My personal understanding)

These pins can be used to make the internal timer count according to a certain polarity of the external pin, that is, external clock mode.

The signals input to these pins can reset, start, stop, etc. the internal counter.

These pins can be provided externally, or they can be outputs generated by an event of other internal timers or comparison outputs to drive the current timer.